公开(公告)号：US08284377B2

公开(公告)日：2012-10-09

申请号：US12553973

申请日：2009-09-03

申请人： Je-Hao Hsu ,  Wen-Pin Chen ,  Chiu-Mei Yu ,  Lee-Hsun Chang

发明人： Je-Hao Hsu ,  Wen-Pin Chen ,  Chiu-Mei Yu ,  Lee-Hsun Chang

IPC分类号： G02F1/1333 ,  G02F1/13 ,  G02F1/1345 ,  G06F3/038 ,  G09G3/36

CPC分类号： G02F1/136259 ,  G09G3/3677 ,  G09G2330/08

摘要： In a display device and a repairing method therefor, the display device includes a gate line and two gate-on-array circuits arranged at two sides thereof. Each of the gate-on-array circuits includes a stage coupled to the gate line. Each the stage includes a transistor and a repair circuit. The first source/drain electrode of the transistor is coupled to the gate line, and the second source/drain electrode of the transistor is coupled to receive a clock pulse signal. The repair circuit includes a first terminal coupled to the gate electrode of the transistor, a second terminal coupled to a predetermined potential, and at least one control terminal adapted to receive at least one repair signal to pull the potential on the gate electrode of the transistor to the predetermined potential. The transistor maintains at off-state when the at least one repair signal is supplied to the repair circuit.

摘要翻译： 在显示装置及其修复方法中，显示装置包括设置在其两侧的栅极线和两个栅极阵列电路。 栅阵列电路中的每一个包括耦合到栅极线的级。 每个级包括晶体管和修复电路。 晶体管的第一源/漏电极耦合到栅极线，并且晶体管的第二源极/漏极电极被耦合以接收时钟脉冲信号。 修复电路包括耦合到晶体管的栅电极的第一端子，耦合到预定电位的第二端子，以及至少一个控制端子，适于接收至少一个修复信号以拉动晶体管的栅电极上的电位 达到预定的电位。 当至少一个修复信号被提供给修复电路时，晶体管保持断开状态。

公开(公告)号：US20100201902A1

公开(公告)日：2010-08-12

申请号：US12553973

申请日：2009-09-03

申请人： Je-Hao HSU ,  Wen-Pin Chen ,  Chiu-Mei Yu ,  Lee-Hsun Chang

发明人： Je-Hao HSU ,  Wen-Pin Chen ,  Chiu-Mei Yu ,  Lee-Hsun Chang

IPC分类号： G02F1/1333 ,  H01J9/50

CPC分类号： G02F1/136259 ,  G09G3/3677 ,  G09G2330/08

摘要： In a display device and a repairing method therefor, the display device includes a gate line and two gate-on-array circuits arranged at two sides thereof. Each of the gate-on-array circuits includes a stage coupled to the gate line. Each the stage includes a transistor and a repair circuit. The first source/drain electrode of the transistor is coupled to the gate line, and the second source/drain electrode of the transistor is coupled to receive a clock pulse signal. The repair circuit includes a first terminal coupled to the gate electrode of the transistor, a second terminal coupled to a predetermined potential, and at least one control terminal adapted to receive at least one repair signal to pull the potential on the gate electrode of the transistor to the predetermined potential. The transistor maintains at off-state when the at least one repair signal is supplied to the repair circuit.

摘要翻译： 在显示装置及其修复方法中，显示装置包括设置在其两侧的栅极线和两个栅极阵列电路。 栅阵列电路中的每一个包括耦合到栅极线的级。 每个级包括晶体管和修复电路。 晶体管的第一源/漏电极耦合到栅极线，并且晶体管的第二源极/漏极电极被耦合以接收时钟脉冲信号。 修复电路包括耦合到晶体管的栅电极的第一端子，耦合到预定电位的第二端子，以及至少一个控制端子，适于接收至少一个修复信号以拉动晶体管的栅电极上的电位 达到预定的电位。 当至少一个修复信号被提供给修复电路时，晶体管保持断开状态。

公开(公告)号：US08223109B2

公开(公告)日：2012-07-17

申请号：US12330523

申请日：2008-12-09

申请人： Lee-Hsun Chang ,  Wen-Pin Chen ,  Je-Hao Hsu ,  Chiu-Mei Yu

发明人： Lee-Hsun Chang ,  Wen-Pin Chen ,  Je-Hao Hsu ,  Chiu-Mei Yu

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G2310/0286 ,  G11C19/28

摘要： A gate driving circuit having a low leakage current control mechanism is disclosed for providing a plurality of gate signals forwarded to a plurality of gate lines respectively. The gate driving circuit includes a plurality of shift registers. Each shift register includes a driving unit, an energy store unit, a buffer unit, a voltage regulation unit, and a control unit. The driving unit generates a gate signal based on a driving control voltage and a first clock. The buffer unit functions to receive a start pulse signal. The energy store unit provides the driving control voltage through performing a charging process based on the start pulse signal. The control unit generates a control signal based on the first clock and a second clock having a phase opposite to the first clock. The voltage regulation unit regulates the driving control voltage based on the control signal.

摘要翻译： 公开了具有低泄漏电流控制机构的栅极驱动电路，用于分别提供转发到多个栅极线的多个栅极信号。 栅极驱动电路包括多个移位寄存器。 每个移位寄存器包括驱动单元，能量存储单元，缓冲单元，电压调节单元和控制单元。 驱动单元基于驱动控制电压和第一时钟产生门信号。 缓冲单元用于接收起始脉冲信号。 能量存储单元通过基于起始脉冲信号执行充电处理来提供驱动控制电压。 控制单元基于第一时钟生成控制信号，并产生具有与第一时钟相反的相位的第二时钟。 电压调节单元根据控制信号来调节驱动控制电压。

公开(公告)号：US20100079443A1

公开(公告)日：2010-04-01

申请号：US12552249

申请日：2009-09-01

申请人： Lee-Hsun Chang ,  Chiu-Mei Yu ,  Wen-Pin Chen ,  Je-Hao Hsu

发明人： Lee-Hsun Chang ,  Chiu-Mei Yu ,  Wen-Pin Chen ,  Je-Hao Hsu

IPC分类号： G09G5/00 ,  G09G3/36

CPC分类号： G09G3/3677 ,  G09G2310/0251 ,  G09G2310/061 ,  G09G2310/08 ,  G09G2320/0257 ,  G09G2330/027

摘要： An apparatus, a shifter register unit, a liquid crystal display device and a method for eliminating afterimage are provided herein, which merely utilize a high voltage source delay discharging phenomenon oriented from a powered-off power device to lead any two of a plurality of existing signal sources employed by the shift register unit to reach a high level used for controlling of charge and discharge of a discharge switching unit corresponding to a pixel unit. Therefore, a power-off afterimage problem could be improved and a signal reset function for power-on also can be achieved.

摘要翻译： 本文提供了一种装置，移位寄存器单元，液晶显示装置和用于消除余像的方法，其仅利用从断电功率器件引导的高电压源延迟放电现象来引导多个存在的任何两个 由移位寄存器单元使用的信号源达到用于控制对应于像素单元的放电切换单元的充电和放电的高电平。 因此，可以提高断电余像问题，并且也可以实现用于上电的信号复位功能。

公开(公告)号：US08411017B2

公开(公告)日：2013-04-02

申请号：US12620594

申请日：2009-11-18

申请人： Je-Hao Hsu ,  Wen-Pin Chen ,  Chiu-Mei Yu ,  Lee-Hsun Chang

发明人： Je-Hao Hsu ,  Wen-Pin Chen ,  Chiu-Mei Yu ,  Lee-Hsun Chang

IPC分类号： G09G3/36 ,  G09G3/38

CPC分类号： G11C19/28 ,  G09G3/3677

摘要： A shift register of an LCD device operates based on two clock signals and maintains the gate voltage of an output transistor switch using two pull-down transistor switches. The gate voltages of the pull-down transistor switches are switched periodically between the high and low level of the clock signals. During the output period, the transistor switches have negative gate-source voltages so as to reduce leakage.

摘要翻译： LCD装置的移位寄存器基于两个时钟信号进行工作，并使用两个下拉晶体管开关维持输出晶体管开关的栅极电压。 下拉晶体管开关的栅极电压在时钟信号的高电平和低电平之间周期性地切换。 在输出期间，晶体管开关具有负栅极 - 源极电压，以减少泄漏。

公开(公告)号：US20090256831A1

公开(公告)日：2009-10-15

申请号：US12190913

申请日：2008-08-13

申请人： Je-Hao Hsu ,  Lee-Hsun Chang ,  Wen-Pin Chen ,  Chiu Mei Yu

发明人： Je-Hao Hsu ,  Lee-Hsun Chang ,  Wen-Pin Chen ,  Chiu Mei Yu

IPC分类号： G09G5/00

CPC分类号： G09G3/20 ,  G09G2310/0267 ,  G09G2330/08

摘要： A display apparatus and a circuit reparation method thereof are provided. The display apparatus comprises a control module, a first gate on array (GOA) circuit, a second GOA circuit, and a variable voltage source. The control module generates at least one control signal. The first GOA circuit is electrically connected to the control module according to a first leading wire in advance. The second GOA circuit is electrically connected to the control module according to a second leading wire in advance. The variable voltage source provides a predetermined voltage level. When the first GOA circuit is disabled, the first GOA circuit and the control module are adjusted to be electrically disconnected, and the first leading wire is electrically connected to the variable voltage source. The display apparatus is operated in response to the control signal and the predetermined voltage level.

摘要翻译： 提供了一种显示装置及其电路修复方法。 显示装置包括控制模块，阵列上的第一栅极（GOA）电路，第二GOA电路和可变电压源。 控制模块产生至少一个控制信号。 第一GOA电路预先根据第一导线电连接到控制模块。 第二GOA电路预先根据第二导线电连接到控制模块。 可变电压源提供预定的电压电平。 当第一GOA电路被禁用时，第一GOA电路和控制模块被调整为电断开，并且第一导线电连接到可变电压源。 响应于控制信号和预定电压电平来操作显示装置。

公开(公告)号：US20100309191A1

公开(公告)日：2010-12-09

申请号：US12620594

申请日：2009-11-18

申请人： Je-Hao Hsu ,  Wen-Pin Chen ,  Chiu-Mei Yu ,  Lee-Hsun Chang

发明人： Je-Hao Hsu ,  Wen-Pin Chen ,  Chiu-Mei Yu ,  Lee-Hsun Chang

IPC分类号： G09G3/36 ,  G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3677

摘要： A shift register of an LCD device operates based on two clock signals and maintains the gate voltage of an output transistor switch using two pull-down transistor switches. The gate voltages of the pull-down transistor switches are switched periodically between the high and low level of the clock signals. During the output period, the transistor switches have negative gate-source voltages so as to reduce leakage.

摘要翻译： LCD装置的移位寄存器基于两个时钟信号进行工作，并使用两个下拉晶体管开关维持输出晶体管开关的栅极电压。 下拉晶体管开关的栅极电压在时钟信号的高电平和低电平之间周期性地切换。 在输出期间，晶体管开关具有负栅极 - 源极电压，以减少泄漏。

公开(公告)号：US20100085083A1

公开(公告)日：2010-04-08

申请号：US12330523

申请日：2008-12-09

申请人： Lee-Hsun Chang ,  Wen-Pin Chen ,  Je-Hao Hsu ,  Chiu-Mei Yu

发明人： Lee-Hsun Chang ,  Wen-Pin Chen ,  Je-Hao Hsu ,  Chiu-Mei Yu

IPC分类号： H03B1/00

CPC分类号： G09G3/3677 ,  G09G2310/0286 ,  G11C19/28

摘要： A gate driving circuit having a low leakage current control mechanism is disclosed for providing a plurality of gate signals forwarded to a plurality of gate lines respectively. The gate driving circuit includes a plurality of shift registers. Each shift register includes a driving unit, an energy store unit, a buffer unit, a voltage regulation unit, and a control unit. The driving unit generates a gate signal based on a driving control voltage and a first clock. The buffer unit functions to receive a start pulse signal. The energy store unit provides the driving control voltage through performing a charging process based on the start pulse signal. The control unit generates a control signal based on the first clock and a second clock having a phase opposite to the first clock. The voltage regulation unit regulates the driving control voltage based on the control signal.

摘要翻译： 公开了具有低泄漏电流控制机构的栅极驱动电路，用于分别提供转发到多个栅极线的多个栅极信号。 栅极驱动电路包括多个移位寄存器。 每个移位寄存器包括驱动单元，能量存储单元，缓冲单元，电压调节单元和控制单元。 驱动单元基于驱动控制电压和第一时钟产生门信号。 缓冲单元用于接收起始脉冲信号。 能量存储单元通过基于起始脉冲信号执行充电处理来提供驱动控制电压。 控制单元基于第一时钟生成控制信号，并产生具有与第一时钟相反的相位的第二时钟。 电压调节单元根据控制信号来调节驱动控制电压。

公开(公告)号：US08692742B2

公开(公告)日：2014-04-08

申请号：US12584221

申请日：2009-09-01

申请人： Tsung-Ting Tsai ,  Lee-Hsun Chang

发明人： Tsung-Ting Tsai ,  Lee-Hsun Chang

IPC分类号： G09G3/30

CPC分类号： G09G3/3233 ,  G09G2300/0426 ,  G09G2300/0439 ,  G09G2300/0465 ,  G09G2300/0842 ,  G09G2300/0852 ,  G09G2320/0223 ,  G09G2320/0233 ,  G09G2330/02 ,  H01L27/326

摘要： A display panel has a plurality of OLED pixels arranged in rows and columns. The pixel driving circuit has two or more current paths through a plurality of switching elements for providing the necessary current to the OLEDs in a pixel. The control end of each switching element is connected to the control end of the other switching elements, but each switching element has a separate power source which can be separately adjustable. In some embodiments, in a pixel or sub-pixel, one switching element is located at one end and one switching element is located at the other end of a pixel length, and each pixel is adjacent to a first power source line and a second power source line along the pixel length for separately providing the electrical power to two switching elements.

摘要翻译： 显示面板具有以行和列排列的多个OLED像素。 像素驱动电路具有穿过多个开关元件的两个或多个电流路径，用于向像素中的OLED提供必要的电流。 每个开关元件的控制端连接到其他开关元件的控制端，但是每个开关元件具有可单独调节的单独的电源。 在一些实施例中，在像素或子像素中，一个开关元件位于一端，一个开关元件位于像素长度的另一端，并且每个像素与第一电源线和第二电源相邻 源极线沿像素长度分开提供电力到两个开关元件。

公开(公告)号：US20090166632A1

公开(公告)日：2009-07-02

申请号：US12147488

申请日：2008-06-27

申请人： Lee-Hsun Chang

发明人： Lee-Hsun Chang

IPC分类号： H01L27/12

CPC分类号： H01L27/124

摘要： A gate driver-on-array structure integrated in a display panel includes a bar-like conductive layer, a semiconductor layer, first conductive patterns, second conductive patterns, a first electrode line and a second electrode line. The bar-like conductive layer has a plurality of regions. The semiconductor layer is disposed within the regions of the bar-like conductive layer. The first conductive patterns and the second conductive patterns are disposed on the semiconductor layer and located within the regions. The bar-like conductive layer is located between the first electrode line and the second electrode line. The first electrode line and the second electrode line are respectively spaced from the bar-like conductive layer by a first distance and a second distance. The GOA structure has first connectors connected to the corresponding first conductive patterns and the first electrode line, and second connectors connected to the second conductive patterns and the second electrode line.

摘要翻译： 集成在显示面板中的栅极驱动器阵列结构包括棒状导电层，半导体层，第一导电图案，第二导电图案，第一电极线和第二电极线。 棒状导电层具有多个区域。 半导体层设置在棒状导电层的区域内。 第一导电图案和第二导电图案设置在半导体层上并位于该区域内。 棒状导电层位于第一电极线和第二电极线之间。 第一电极线和第二电极线分别与棒状导电层隔开第一距离和第二距离。 GOA结构具有连接到相应的第一导电图案和第一电极线的第一连接器，以及连接到第二导电图案和第二电极线的第二连接器。