公开(公告)号：US12072356B2

公开(公告)日：2024-08-27

申请号：US17737373

申请日：2022-05-05

Applicant: Lemon Inc.

Inventor： Junmou Zhang ,  Shan Lu ,  Chuang Zhang ,  Yimin Chen ,  Jian Wang ,  Yuanlin Cheng

IPC: G01R19/10 ,  H03K17/687

CPC classification number: G01R19/10 ,  H03K17/6871

Abstract: A voltage detection circuit and method for an integrated circuit, and an integrated circuit are provided. The voltage detection circuit includes: a first current source, a first branch and a second branch. A current outputted by the first current source is allocated to the first branch and the second branch. The first branch includes a first voltage control current component and a first load connected in series. The second branch includes a current signal detection component and a second load connected in series. A voltage signal to be detected is inputted to a control signal input terminal of the first voltage control current component. The current signal detection component is configured to output, in real time, a preset signal characterizing a second current flowing through the second branch, to determine change of the voltage signal to be detected based on the preset signal.

公开(公告)号：US12013804B2

公开(公告)日：2024-06-18

申请号：US17737527

申请日：2022-05-05

Applicant: Lemon Inc.

Inventor： Yimin Chen ,  Shan Lu ,  Junmou Zhang ,  Chuang Zhang ,  Yuanlin Cheng ,  Jian Wang

IPC: G06F13/42 ,  G06F9/30 ,  G06F13/40 ,  G06F15/173

CPC classification number: G06F13/4282 ,  G06F9/30047 ,  G06F13/4068 ,  G06F15/17368

Abstract: An integrated circuit, and a data processing device and method are provided. The integrated circuit includes a processor circuit and an accelerator circuit. The processor circuit includes a processor, a first data storage section, and a first data input/output interface. The accelerator circuit includes an accelerator and a second data input/output interface. The second data input/output interface is electrically connected to the first data input/output interface, so that the accelerator circuit can perform information interaction with the first data storage section.

公开(公告)号：US20240345806A1

公开(公告)日：2024-10-17

申请号：US18630753

申请日：2024-04-09

Applicant: Beijing Youzhuju Network Technology Co., Ltd. ,  Lemon Inc.

Inventor： Zhitao Yang ,  Qi Chen ,  Jian Lai ,  Yimin Chen ,  Shan Lu ,  Jian Wang

IPC: G06F7/544 ,  G06F7/487

CPC classification number: G06F7/5443 ,  G06F7/4876

Abstract: A computing apparatus and method, an electronic device and a storage medium are provided. The computing apparatus includes: a preprocessing module configured to receive N pairs of input parameters, and perform format conversion on each pair of input parameters according to the precision type of the N pairs of input parameters, and obtain N pairs of processed input parameters; and a calculation module configured to respectively compute a product of exponents and mantissas of each pair of processed input parameters, and obtain an output result based on the product of exponents and mantissas of each pair of processed input parameters. The computing apparatus supports multiply-accumulate computation of a plurality of floating-point types. The computing apparatus can multiplex the multiplication computation of the mantissa and make the computing apparatus support multiply-accumulate computations in a plurality of precision formats at the cost of lower area and power consumption.

公开(公告)号：US11914540B2

公开(公告)日：2024-02-27

申请号：US17737415

申请日：2022-05-05

Applicant: Lemon Inc.

Inventor： Yimin Chen ,  Shan Lu ,  Chuang Zhang ,  Junmou Zhang ,  Yuanlin Cheng ,  Jian Wang

IPC: G06F13/40

CPC classification number: G06F13/4027 ,  G06F2213/40

Abstract: An on-chip integrated circuit, a data processing device and a method are provided. The on-chip integrated circuit includes: a processor circuit and an accelerator circuit. The processor circuit includes a processor and a data storage area, the processor is connected to the data storage area through a first bus in the processor circuit. The accelerator circuit includes an accelerator and a second bus, the accelerator is connected to the second bus, and the second bus is bridged with the first bus corresponding to the data storage area, to perform data interaction between the accelerator and the data storage area, which can reduce the congestion on a bus of the processor and improve the quality of service of the application.

公开(公告)号：US20240378022A1

公开(公告)日：2024-11-14

申请号：US18654380

申请日：2024-05-03

Applicant: Beijing Youzhuju Network Technology Co., Ltd. ,  Lemon Inc.

Inventor： Zhilin XU ,  Longfei BAI ,  Qi CHEN ,  Yimin Chen ,  Shan Lu ,  Jian Wang

IPC: G06F7/78 ,  G06F9/30 ,  G06F17/16

Abstract: A data conversion method and apparatus, an electronic device and a storage medium for converting dimensions of a first data combination. The data conversion method includes: reading n elements in the first data combination according to a first-dimension direction to obtain a first processing group, a first element to an n-th element in the first processing group are arranged according to the first-dimension direction, and n is a positive integer; performing a transpose on the first dimension and the third dimension of the first processing group to obtain a second processing group, a first element to an n-th element in the second processing group are arranged in a third-dimension direction; and writing the first element to the n-th element in the second processing group to a first storage.