公开(公告)号：USD337338S

公开(公告)日：1993-07-13

申请号：US834498

申请日：1992-02-11

申请人： Leon Chang

设计人： Leon Chang

公开(公告)号：US06368882B1

公开(公告)日：2002-04-09

申请号：US09531233

申请日：2000-03-21

申请人： Leon Chang ,  Chien-Hung Chen

发明人： Leon Chang ,  Chien-Hung Chen

IPC分类号： H01L2100

CPC分类号： H01L22/24 ,  G01N15/02

摘要： The present invention discloses a method to detect organic contamination in process environment of integrated circuits by using hemispherical-grain polysilicon layer that is formed in the process environment. The organic residue will contaminates the substrate which the hemispherical-grain polysilicon layer is formed thereon so as that the grain size of the polysilicon layer is between about 0.2 to 0.4 micrometers. The grain size of the hemispherical-grain polysilicon layer that is fabricated in a clean process environment is between about 0.5 to 0.8 micrometers. In other words, if organic contamination is residual in process environment, the grain size of the hemispherical-grain polysilicon layer that is fabricated in the process environment is smaller than a certain size to determine that the process environment is contaminated by organic contamination.

摘要翻译： 本发明公开了一种通过使用在工艺环境中形成的半球形多晶硅层来检测集成电路的工艺环境中的有机污染物的方法。 有机残留物将污染半球形多晶硅层形成在其上的基底，使得多晶硅层的晶粒尺寸在约0.2至0.4微米之间。 在清洁工艺环境中制造的半球形晶粒多晶硅层的晶粒尺寸在约0.5至0.8微米之间。 换句话说，如果在工艺环境中有机污染是残留的，则在工艺环境中制造的半球形晶粒多晶硅层的晶粒尺寸小于一定的尺寸，以确定工艺环境被有机污染物污染。

公开(公告)号：USD342317S

公开(公告)日：1993-12-14

申请号：US773687

申请日：1991-10-07

申请人： Myron Orlinsky ,  George Krubski ,  Leon Chang

设计人： Myron Orlinsky ,  George Krubski ,  Leon Chang

公开(公告)号：US06551900B1

公开(公告)日：2003-04-22

申请号：US09547730

申请日：2000-04-12

申请人： Yifu Chung ,  Leon Chang ,  Ping-Wei Lin

发明人： Yifu Chung ,  Leon Chang ,  Ping-Wei Lin

IPC分类号： H01L2176

CPC分类号： H01L21/28185 ,  H01L21/28194 ,  H01L21/28211 ,  H01L29/42368 ,  H01L29/512 ,  H01L29/66734 ,  H01L29/7813

摘要： A method for improving gate oxide thinning issue at trench corners is disclosed. The method comprises steps as follows. Firstly, a silicon substrate having a trench therein is provided. HDPCVD technology to form a first oxide layer on the sidewall and the bottom of the trench is carried out. After performing an etchback to leave the first oxide layer on the bottom of the trench, a second oxide layer is formed on the first oxide layer and on sidewalls of the trench by LPCVD technology. Thereafter, an isotropic etching is performed so as to remove a substantially portion of the second oxide layer and leave a remnant portion of second oxide layer on the trench corners. As a consequently, the trench corners are smooth. Finally, a thermal oxidation to form a third oxide layer on the sidewall of the trench is carried achieved to accomplish the gate oxide formation.

摘要翻译： 公开了一种在沟槽角改善栅极氧化物薄化问题的方法。 该方法包括以下步骤。 首先，提供其中具有沟槽的硅衬底。 HDPCVD技术在沟槽的侧壁和底部上形成第一氧化物层。 在进行回蚀以在沟槽的底部离开第一氧化物层之后，通过LPCVD技术在第一氧化物层和沟槽的侧壁上形成第二氧化物层。 此后，进行各向同性蚀刻以去除第二氧化物层的大致部分，并且在沟槽角上留下第二氧化物层的残余部分。 因此，沟渠的角落是光滑的。 最后，实现在沟槽的侧壁上形成第三氧化物层的热氧化以实现栅极氧化物的形成。

公开(公告)号：US06255188B1

公开(公告)日：2001-07-03

申请号：US09264600

申请日：1999-03-08

申请人： Chien-Hung Chen ,  Leon Chang ,  Wei-Shang King

发明人： Chien-Hung Chen ,  Leon Chang ,  Wei-Shang King

IPC分类号： H01L2176

CPC分类号： H01L21/32134 ,  H01L21/76202

摘要： A method of removing a polysilicon buffer in a method of forming a field oxide and an active area is disclosed herein that comprises the step of applying an etching selectivity solution to the polysilicon buffer to substantially remove the polysilicon buffer without substantially affecting the field oxide, a pad oxide, and the substrate. An etching selectivity solution is defined herein is a solution that has an etching rate for one material that is higher than for another material. In this case, the etching selectivity solution has an etching rate for polysilicon material that is higher than its etching rate for field oxide material. Accordingly, when the etching selectivity solution is applied to the polysilicon buffer, it will substantially etch off the polysilicon buffer without substantially affecting the field oxide. In the preferred embodiment, the etching selectivity solution comprises a mixture of HF and HNO3, or HF, HNO3 and CH3COOH. The advantage of this method is that it reduces the likelihood of the formation of pits within the field oxide, pad oxide and the substrate. Consequently, the charge-to-breakdown voltage for the device is not degraded because of the absence of the pits. In addition, methods of forming a field oxide and an active area are disclosed herein that uses at least in part the disclosed method of removing a polysilicon buffer.

摘要翻译： 本文公开了在形成场氧化物和有源区域的方法中去除多晶硅缓冲液的方法，其包括将蚀刻选择性溶液施加到多晶硅缓冲液以基本上去除多晶硅缓冲液而基本上不影响场氧化物的步骤， 衬垫氧化物和衬底。 本文定义的蚀刻选择性溶液是具有比另一种材料高的一种材料的蚀刻速率的溶液。 在这种情况下，蚀刻选择性溶液对于多晶硅材料的蚀刻速率高于其对于场氧化物材料的蚀刻速率。 因此，当将蚀刻选择性溶液施加到多晶硅缓冲液时，其将基本上蚀刻多晶硅缓冲液而基本上不影响场氧化物。 在优选的实施方案中，蚀刻选择性溶液包括HF和HNO 3或HF，HNO 3和CH 3 COOH的混合物。 该方法的优点是降低了在场氧化物，衬垫氧化物和衬底内形成凹坑的可能性。 因此，由于不存在凹坑，器件的击穿电压不会降低。 此外，本文公开了形成场氧化物和有源区的方法，至少部分地使用所公开的去除多晶硅缓冲液的方法。

公开(公告)号：USD336484S

公开(公告)日：1993-06-15

申请号：US912601

申请日：1992-07-13

申请人： Lester Morrow ,  Leon Chang

设计人： Lester Morrow ,  Leon Chang

公开(公告)号：US5141104A

公开(公告)日：1992-08-25

申请号：US719815

申请日：1991-06-24

申请人： Lester Morrow ,  Leon Chang

发明人： Lester Morrow ,  Leon Chang

IPC分类号： A47F7/024 ,  B65D73/00

CPC分类号： A47F7/0243 ,  B65D73/0064 ,  Y10S206/806

摘要： A hanger for supporting a pair of eyeglasses. The hanger has a central portion, two arms which extend away from the central portion and which terminate at end portions. Each end portion has a respective opening into which is inserted a respective temple bar of the pair of eyeglasses. The central portion has an aperture into which is inserted a support arm for balancing the eyeglasses. The aperture is substantially equidistant from the openings in the end portions. The arms have a lower edge which defines a space directly between the end portions.

摘要翻译： 用于支撑一副眼镜的衣架。 衣架具有中心部分，两个臂从中心部分延伸并终止于端部。 每个端部具有相应的开口，其中插入一对眼镜的相应的镜杆。 中心部分具有孔，插入有用于平衡眼镜的支撑臂。 孔径与端部部分的开口基本上等距。 臂具有下边缘，其在端部之间直接限定空间。