Serriform strip crosstie memory
    1.
    发明授权
    Serriform strip crosstie memory 失效
    Serriform strip交叉记忆

    公开(公告)号:US4231107A

    公开(公告)日:1980-10-28

    申请号:US877633

    申请日:1978-02-14

    IPC分类号: G11C19/08

    摘要: A magnetic crosstie memory using a plurality of Permalloy thin-film strips of uniform thicknesses having parallel denticulated margins etched to align with the oblong axis of the strip. Each pair of opposite denticles defines a distinct memory cell. Magnetization relaxes upon removal of a magnetic field applied normal to the oblong axis of the thin-film with each component assuming that orientation requiring the least rotation for parallel alignment with the least distant edge. Two domains are thus formed with a domain wall suitable for storage and propagation of binary information centered between the margins and extending the length of the strip. Crossties form at the necks of the serrations and Bloch lines are positioned in potential wells between the necks. Binary information, represented by the crosstie and Bloch lines in various conventions is propagated along the domain wall from cell to cell by particular sequences of magnetic pulses.

    摘要翻译: 一种磁性交叉记忆体,其使用均匀厚度的多个坡莫合金薄膜带,其平行的齿形边缘被蚀刻以与条带的长轴对准。 每对相对的牙列定义了不同的记忆单元。 当去除垂直于薄膜的长轴的磁场时,磁化将松弛,其中每个部件假设取向需要最小旋转以与最远的边缘平行对准。 因此,两个区域形成有适合于在边缘之间居中并延长条带长度的二进制信息的存储和传播的畴壁。 在锯齿的颈部形成的克罗斯克斯和布洛赫线位于颈部之间的潜在井中。 由各种惯例中的交叉和Bloch线表示的二进制信息通过特定的脉冲序列沿着域从单元传播到单元。

    Magnetoresistive power amplifier
    2.
    发明授权
    Magnetoresistive power amplifier 失效
    磁阻功率放大器

    公开(公告)号:US4301418A

    公开(公告)日:1981-11-17

    申请号:US942006

    申请日:1978-09-13

    IPC分类号: H03F15/00

    CPC分类号: H03F15/00

    摘要: A process and a small, sensitive, low noise, high gain, power amplifier used in the process, for exploiting the anisotropic magnetoresistance effect in a ferromagnetic thin-film. The magnetization of the thin-film is biased to lie along the hard axis. The amplifier is configured so that a sensing current in the thin-film flows at an angle of forty-five degrees to the nominal direction of magnetization, and the current to be amplified produces a magnetic field parallel to the easy axis of the thin-film.

    摘要翻译: 在该过程中使用的工艺和小型,灵敏,低噪声,高增益功率放大器,用于利用铁磁性薄膜中的各向异性磁阻效应。 薄膜的磁化被偏置成沿着硬轴。 放大器被配置为使得薄膜中的感测电流以与标称磁化方向成45度的角度流动,并且待放大的电流产生平行于薄膜的容易轴的磁场 。

    Crosstie memory bit stretcher detector
    3.
    发明授权
    Crosstie memory bit stretcher detector 失效
    克罗斯提记忆位担架检测器

    公开(公告)号:US4192012A

    公开(公告)日:1980-03-04

    申请号:US958913

    申请日:1978-11-08

    IPC分类号: G11C19/08

    CPC分类号: G11C19/0866

    摘要: A magnetoresistance detector linearly stretching single bits of binary inmation such as those represented by Bloch line - crosstie pairs, along the major dimension of a thin magnetic film strip such as a serriform crosstie memory. The detector circuit is overlaid upon the thin magnetic film strip. In a selected area, less pronounced serrations in the adjacent margins, in conjunction with a magnetic field created by current through the detector circuit enable Bloch lines entering the area to travel farther. A series of oriented open segments in the overlain section of the detector circuit, arranged in symmetric correspondence with serrations in the adjacent margins, enhances the difference between logical zero and one signals in the detector circuit.

    摘要翻译: 磁阻检测器沿着薄磁带(如三维交叉存储器)的主要尺寸线性拉伸诸如由Bloch线 - 交叉对表示的二进制信息的单个位。 检测器电路覆盖在薄磁片上。 在选定的区域中,相邻边缘中不太明显的锯齿结合由电流通过检测器电路产生的磁场,使得进入该区域的布洛赫线更远地行进。 检测器电路的重叠部分中的一系列定向的开放段与相邻边缘中的锯齿对称地布置,增强了检测器电路中逻辑零和一个信号之间的差异。

    Crosstie random access memory element having associated read/write
circuitry
    4.
    发明授权
    Crosstie random access memory element having associated read/write circuitry 失效
    具有相关联的读/写电路的交叉随机存取存储元件

    公开(公告)号:US5165087A

    公开(公告)日:1992-11-17

    申请号:US615933

    申请日:1990-11-19

    申请人: Leonard J. Schwee

    发明人: Leonard J. Schwee

    IPC分类号: G11C11/14

    CPC分类号: G11C11/14

    摘要: A crosstie random access memory system for reading and/or writing, utilizing permalloy thin films patterned into "wiggle" shapes to form a plurality of memory cells in an array. Address lines for reading and/or writing into the memory cells are operative through associated circuitry for writing at selected locations in the array using coincident currents. Current passed through each column of memory cells effects magnetoresistance readout in conjunction with row address lines by means of the aforementioned associated circuitry which is arranged so as to be integrated on a single substrate with the memory array.

    摘要翻译: 一种用于读取和/或写入的交叉随机存取存储器系统,利用图案化为“摆动”形状的坡莫合金薄膜以在阵列中形成多个存储器单元。 用于读取和/或写入存储器单元的地址线通过相关联的电路工作,用于使用重合电流在阵列中的选定位置处写入。 通过每列存储器单元的电流通过上述相关联的电路结合行地址线实现磁阻读出,其被布置为与存储器阵列集成在单个衬底上。

    Enhanced crossite random access memory element and a process for the
fabrication thereof
    5.
    发明授权
    Enhanced crossite random access memory element and a process for the fabrication thereof 失效
    增强的交叉随机存取存储元件及其制造方法

    公开(公告)号:US4962477A

    公开(公告)日:1990-10-09

    申请号:US505617

    申请日:1983-06-20

    申请人: Leonard J. Schwee

    发明人: Leonard J. Schwee

    IPC分类号: G11C19/08

    CPC分类号: G11C19/08 G11C19/0858

    摘要: An enhanced random access memory element and a process for its fabrication,herein permalloy thin films are patterned, inter alia, into a plurality of geminous memory cells to form a matrix or array of juxtaposed sloped columns thereof is disclosed. Each of the geminous memory cells is configured into a unique pattern comprising twin sub-patterns joined in an opposite fashion, i.e. reversed and inversed, so as to share a common area of permalloy. Consequently, magnetic domain walls (Neel walls) are formed at opposite and adjacent apexes of the unique pattern parallel to the easy axis after a predetermined magnetic field is applied along the hard axis of the array of geminous memory cells and then reduced to zero. In this way, the magnetization is properly aligned for use of the array of geminous memory cells as an enhanced nonvolatile random access memory element. Subsequent magnetization of the proper amount at particular ones of the geminous memory cells will cause two crossties and two Bloch lines to form therein so as to couple to each other, crosstie to Bloch line, Bloch line to crosstie. This configuration provides a larger readout signal, a larger signal to noise ratio, and will operate at lower power levels for the same density of information than previous crosstie random access memory elements.

    摘要翻译: 增强的随机存取存储器元件及其制造方法,其中坡莫合金薄膜特别被图案化成多个双晶存储器单元以形成并置的倾斜柱的阵列或阵列。 每个双层存储单元被配置成独特的图案,其包括以相反的方式连接的双子图案,即反向和反转,以便共享坡莫合金的公共区域。 因此,在沿着双晶存储器单元阵列的硬轴施加预定磁场之后,磁畴壁(Néel壁)形成在与容易轴平行的独特图案的相对和相邻顶点处,然后减小到零。 以这种方式,磁化被适当地对准,以使用作为增强的非易失性随机存取存储器元件的双重存储器单元的阵列。 随后在特定的双子记忆单元中的适当量的磁化将导致在其中形成两个交叉点和两个Bloch线,以便彼此耦合,交叉到Bloch线,Bloch线交叉。 该配置提供更大的读出信号,更大的信噪比,并且对于与先前的交叉随机存取存储器元件相同的信息密度将在较低功率水平下操作。

    Bloch-line memory element and ram memory
    6.
    发明授权
    Bloch-line memory element and ram memory 失效
    Bloch行内存元素和ram内存

    公开(公告)号:US4901278A

    公开(公告)日:1990-02-13

    申请号:US54977

    申请日:1987-05-28

    申请人: Leonard J. Schwee

    发明人: Leonard J. Schwee

    IPC分类号: G11C19/08

    CPC分类号: G11C19/0858

    摘要: The present invention relates to a Bloch-line memory element and a nonvolatile RAM memory using such a Bloch-line memory element. The Bloch-line memory element comprises a planar magnetic memory element having magnetic domains separated by a wall which contains a Bloch-line disposed within the individual memory element. Coincident write lines interact with the magnetic element for writing a Bloch-line to a predetermined area within the memory element. For sensing the presence or absence of a Bloch-line within the predetermined area, one write conductor and a sense line are used for determining the logic state of the particular memory element. A plurality of memory elements are disposed in an address matrix and can be selected for reading from or writing to the particular Bloch-line RAM memory element for determining or writing bits of words.

    摘要翻译: 本发明涉及使用这种Bloch行存储元件的Bloch行存储元件和非易失性RAM存储器。 布洛赫线存储元件包括具有由壁分隔的磁畴的平面磁存储元件,该磁畴包含布置在各个存储元件内的布洛赫线。 重合写入线与用于将Bloch线写入到存储元件内的预定区域的磁性元件相互作用。 为了感测在预定区域内存在或不存在布洛赫线,使用一个写导体和感测线来确定特定存储元件的逻辑状态。 多个存储器元件设置在地址矩阵中,并且可以被选择用于从特定的布洛赫线RAM存储器元件读取或写入以用于确定或写入字的位。

    Sense amplifier control system for ferroelectric memories
    8.
    发明授权
    Sense amplifier control system for ferroelectric memories 失效
    用于铁电存储器的感应放大器控制系统

    公开(公告)号:US5793667A

    公开(公告)日:1998-08-11

    申请号:US733455

    申请日:1996-10-18

    申请人: Leonard J. Schwee

    发明人: Leonard J. Schwee

    IPC分类号: G11C7/06 G11C11/22

    CPC分类号: G11C11/22 G11C7/065

    摘要: Different sequences of pulses applied to three terminals of a sense amplir section in timed relation to address pulses applied to a word line of a ferroelectric memory cell, controls detection and transfer of data with respect to a selected bit line to which the sense amplifier section is connected for rapid reset following data transfer without any precharge.

    摘要翻译: 施加到读出放大器部分的三个端子的不同的脉冲序列与施加到铁电存储器单元的字线的寻址脉冲的定时关系相对应地控制数据相对于所选择的位线的检测和传输,读出放大器部分是 连接用于数据传输后的快速复位,无需任何预充电。

    Bloch-line memory element and RAM memory

    公开(公告)号:USRE34370E

    公开(公告)日:1993-09-07

    申请号:US652752

    申请日:1991-02-08

    申请人: Leonard J. Schwee

    发明人: Leonard J. Schwee

    IPC分类号: G11C11/14

    CPC分类号: G11C11/14

    摘要: The present invention relates to a Bloch-line memory element and a nonvolatile RAM memory using such a Bloch-line memory element. The Bloch-line memory element comprises a planar magnetic memory element having magnetic domains separated by a wall which contains a Bloch-line disposed within the individual memory element. Coincident write lines interact with the magnetic element for writing a Bloch-line to a predetermined area within the memory element. For sensing the presence or absence of a Bloch-line within the predetermined area, one write conductor and a sense line are used for determining the logic state of the particular memory element. A plurality of memory elements are disposed in an address matrix and can be selected for reading from or writing to the particular Bloch-line RAM memory element for determining or writing bits of words.

    Crosstie random access memory element having associated read/write
circuitry
    10.
    发明授权
    Crosstie random access memory element having associated read/write circuitry 失效
    具有相关联的读/写电路的交叉随机存取存储元件

    公开(公告)号:US5229961A

    公开(公告)日:1993-07-20

    申请号:US615832

    申请日:1990-11-19

    申请人: Leonard J. Schwee

    发明人: Leonard J. Schwee

    IPC分类号: G11C11/14 G11C19/08

    CPC分类号: G11C19/0841 G11C11/14

    摘要: A nonvolatile random access memory array is formed by permalloy thin films patterned into "wiggle" shapes. Address lines for reading and/or writing into the memory cells are operatively connected to associated circuitry such that writing at a selected location in the array is accomplished using coincident currents. Each memory cell in the array is arranged for passage of column conducted current to effect magnetoresistance readout in conjunction with row address lines and the aforementioned associated circuitry.

    摘要翻译: 非易失性随机存取存储器阵列由图案化为“摆动”形状的坡莫合金薄膜形成。 用于读取和/或写入存储器单元的地址线可操作地连接到相关联的电路,使得在阵列中的选定位置的写入是使用重合电流完成的。 阵列中的每个存储单元被布置成通过列传导电流以结合行地址线和上述相关联的电路实现磁阻读出。