Partial good integrated circuit and method of testing same
    1.
    发明授权
    Partial good integrated circuit and method of testing same 有权
    部分良好的集成电路及其测试方法

    公开(公告)号:US07305600B2

    公开(公告)日:2007-12-04

    申请号:US10651874

    申请日:2003-08-29

    IPC分类号: G01R31/28

    摘要: An integrated circuit, including: a multiplicity of macro-circuits, each macro-circuit having the same function; a fuse bank containing a multiplicity of fuses, the state of the fuses storing test data indicating at least which macro-circuits failed a test; and means for preventing utilization of failing macro-circuits during operation of the integrated circuit and a method generating a partial good integrated circuit, the method including: providing an integrated circuit have a multiplicity of macro-circuits arranged in one or more groups, each macro-circuit having the same function and a fuse bank containing fuses; testing each macro-circuit prior to a fuse programming operation; programming the fuses in the fuse bank in order to store data indicating at least which macro-circuits failed the testing step; and preventing utilization of each failing macro-circuit during operation of the integrated based on the data stored in the fuse bank.

    摘要翻译: 一种集成电路,包括:多个宏电路,每个宏电路具有相同的功能; 包含多个保险丝的保险丝库,保险丝的状态存储测试数据,至少指示哪些宏电路测试失败; 以及用于防止在集成电路运行期间利用故障宏电路的装置和产生部分良好集成电路的方法,所述方法包括:提供集成电路,其具有以一组或多组布置的多个宏电路,每个宏 具有相同功能的电路和包含保险丝的保险丝库; 在保险丝编程操作之前测试每个宏电路; 对保险丝组中的熔丝进行编程,以便存储指示测试步骤中至少哪些宏电路失败的数据; 并且基于存储在熔丝库中的数据,防止在集成的操作期间利用每个故障的宏电路。

    Partial good integrated circuit and method of testing same
    2.
    发明授权
    Partial good integrated circuit and method of testing same 失效
    部分良好的集成电路及其测试方法

    公开(公告)号:US07478301B2

    公开(公告)日:2009-01-13

    申请号:US12114198

    申请日:2008-05-02

    IPC分类号: G01R31/28

    摘要: An integrated circuit and method of testing and repairing the integrated circuit. The integrated circuit includes: a multiplicity of macro-circuits having the same function; a fuse bank, the state of the fuses storing test data indicating at least which macro-circuits failed a test; and means for preventing utilization of failing macro-circuits during operation of the integrated circuit and a method generating a partial good integrated circuit, the method including: providing an integrated circuit have a multiplicity of macro-circuits arranged in one or more groups, each macro-circuit having the same function and a fuse bank containing fuses; testing each macro-circuit prior to a fuse programming operation; programming the fuses in the fuse bank in order to store data indicating at least which macro-circuits failed the testing step; and preventing utilization of each failing macro-circuit during operation of the integrated based on the data stored in the fuse bank.

    摘要翻译: 集成电路的测试和维修的集成电路和方法。 集成电路包括:具有相同功能的多个宏电路; 保险丝库,保险丝的状态存储测试数据,至少指示哪些宏观电路未通过测试; 以及用于防止在集成电路运行期间利用故障宏电路的装置和产生部分良好集成电路的方法,所述方法包括:提供集成电路,其具有以一组或多组布置的多个宏电路,每个宏 具有相同功能的电路和包含保险丝的保险丝库; 在保险丝编程操作之前测试每个宏电路; 对保险丝组中的熔丝进行编程,以便存储指示测试步骤中至少哪些宏电路失败的数据; 并且基于存储在熔丝库中的数据,防止在集成的操作期间利用每个故障的宏电路。

    Partial good integrated circuit and method of testing same
    3.
    发明授权
    Partial good integrated circuit and method of testing same 失效
    部分良好的集成电路及其测试方法

    公开(公告)号:US07434129B2

    公开(公告)日:2008-10-07

    申请号:US11859834

    申请日:2007-09-24

    IPC分类号: G01R31/28

    摘要: An integrated circuit and method of testing and repairing the integrated circuit. The integrated circuit includes: a multiplicity of macro-circuits having the same function; a fuse bank, the state of the fuses storing test data indicating at least which macro-circuits failed a test; and means for preventing utilization of failing macro-circuits during operation of the integrated circuit and a method generating a partial good integrated circuit, the method including: providing an integrated circuit have a multiplicity of macro-circuits arranged in one or more groups, each macro-circuit having the same function and a fuse bank containing fuses; testing each macro-circuit prior to a fuse programming operation; programming the fuses in the fuse bank in order to store data indicating at least which macro-circuits failed the testing step; and preventing utilization of each failing macro-circuit during operation of the integrated based on the data stored in the fuse bank.

    摘要翻译: 集成电路的测试和修复的集成电路和方法。 集成电路包括:具有相同功能的多个宏电路; 保险丝库,保险丝的状态存储测试数据,至少指示哪些宏观电路未通过测试; 以及用于防止在集成电路运行期间利用故障宏电路的装置和产生部分良好集成电路的方法,所述方法包括:提供集成电路,其具有以一组或多组布置的多个宏电路,每个宏 具有相同功能的电路和包含保险丝的保险丝库; 在保险丝编程操作之前测试每个宏电路; 对保险丝组中的熔丝进行编程,以便存储指示测试步骤中至少哪些宏电路失败的数据; 并且基于存储在熔丝库中的数据,防止在集成的操作期间利用每个故障的宏电路。

    PARTIAL GOOD INTEGRATED CIRCUIT AND METHOD OF TESTING SAME
    4.
    发明申请
    PARTIAL GOOD INTEGRATED CIRCUIT AND METHOD OF TESTING SAME 失效
    部分良好集成电路及其测试方法

    公开(公告)号:US20080209289A1

    公开(公告)日:2008-08-28

    申请号:US12114198

    申请日:2008-05-02

    IPC分类号: G01R31/3177 G06F11/25

    摘要: An integrated circuit and method of testing and repairing the integrated circuit. The integrated circuit includes: a multiplicity of macro-circuits having the same function; a fuse bank, the state of the fuses storing test data indicating at least which macro-circuits failed a test; and means for preventing utilization of failing macro-circuits during operation of the integrated circuit and a method generating a partial good integrated circuit, the method including: providing an integrated circuit have a multiplicity of macro-circuits arranged in one or more groups, each macro-circuit having the same function and a fuse bank containing fuses; testing each macro-circuit prior to a fuse programming operation; programming the fuses in the fuse bank in order to store data indicating at least which macro-circuits failed the testing step; and preventing utilization of each failing macro-circuit during operation of the integrated based on the data stored in the fuse bank.

    摘要翻译: 集成电路的测试和修复的集成电路和方法。 集成电路包括:具有相同功能的多个宏电路; 保险丝库,保险丝的状态存储测试数据,至少指示哪些宏观电路未通过测试; 以及用于防止在集成电路运行期间利用故障宏电路的装置和产生部分良好集成电路的方法,所述方法包括:提供集成电路,其具有以一组或多组布置的多个宏电路,每个宏 具有相同功能的电路和包含保险丝的保险丝库; 在保险丝编程操作之前测试每个宏电路; 对保险丝组中的保险丝进行编程,以便存储指示测试步骤中至少哪些宏电路失败的数据; 并且基于存储在熔丝库中的数据,防止在集成的操作期间利用每个故障的宏电路。