Methods of protecting elevated polysilicon structures during etching processes
    1.
    发明授权
    Methods of protecting elevated polysilicon structures during etching processes 有权
    在蚀刻过程中保护高架多晶硅结构的方法

    公开(公告)号:US08569173B2

    公开(公告)日:2013-10-29

    申请号:US13314270

    申请日:2011-12-08

    IPC分类号: H01L21/302

    CPC分类号: H01L27/11534 H01L21/28273

    摘要: Disclosed herein are various methods of protecting elevated polysilicon structures during etching processes. In one example, the method includes forming a layer stack above a semiconducting substrate for a memory device, forming a protective mask layer above the layer stack of the memory device and performing at least one etching process to define a gate electrode for a transistor while the protective mask is in position above the layer stack for the memory device.

    摘要翻译: 本文公开了在蚀刻工艺期间保护升高的多晶硅结构的各种方法。 在一个示例中,该方法包括在用于存储器件的半导体衬底之上形成层堆叠,在存储器件的层堆叠之上形成保护掩模层,并执行至少一个蚀刻工艺以限定晶体管的栅电极,而 保护罩位于存储器件的层堆叠之上。

    Methods of Protecting Elevated Polysilicon Structures During Etching Processes
    2.
    发明申请
    Methods of Protecting Elevated Polysilicon Structures During Etching Processes 有权
    在蚀刻过程中保护高架多晶硅结构的方法

    公开(公告)号:US20130149851A1

    公开(公告)日:2013-06-13

    申请号:US13314270

    申请日:2011-12-08

    IPC分类号: H01L21/28

    CPC分类号: H01L27/11534 H01L21/28273

    摘要: Disclosed herein are various methods of protecting elevated polysilicon structures during etching processes. In one example, the method includes forming a layer stack above a semiconducting substrate for a memory device, forming a protective mask layer above the layer stack of the memory device and performing at least one etching process to define a gate electrode for a transistor while the protective mask is in position above the layer stack for the memory device.

    摘要翻译: 本文公开了在蚀刻工艺期间保护升高的多晶硅结构的各种方法。 在一个示例中,该方法包括在用于存储器件的半导体衬底之上形成层堆叠,在存储器件的层堆叠之上形成保护掩模层,并执行至少一个蚀刻工艺以限定晶体管的栅电极,而 保护罩位于存储器件的层堆叠之上。