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公开(公告)号：US20090070554A1
公开(公告)日：2009-03-12
申请号：US11853866
申请日：2007-09-12
申请人： Lin Wang , Masud Kamal , Paul Bassett , Suresh Venkumahanti , Jian Shen
发明人： Lin Wang , Masud Kamal , Paul Bassett , Suresh Venkumahanti , Jian Shen
IPC分类号： G06F9/40
CPC分类号： G06F9/3851 , G06F9/30123 , G06F9/30141 , G06F13/4252 , Y02D10/14 , Y02D10/151
摘要： The present disclosure includes a multi-threaded processor that includes a first register file associated with a first thread and a second register file associated with a second thread. At least one hardware resource is shared by the first and second register files. In addition, the first thread may have a pipeline access position that is non-sequential to the second thread. A method of accessing a plurality of register files is also disclosed. The method includes reading data from a first register file while concurrently reading data from a second register file. The first register file is associated with a first instruction stream and the second register file is associated with a second instruction stream. The first instruction stream is sequential to the second instruction stream in an execution pipeline of a processor, and the first register file is in a non-adjacent location with respect to the second register file.
摘要翻译： 本公开包括多线程处理器，其包括与第一线程相关联的第一寄存器文件和与第二线程相关联的第二寄存器文件。 至少一个硬件资源由第一和第二寄存器文件共享。 此外，第一线程可以具有与第二线程不连续的管线访问位置。 还公开了一种访问多个寄存器文件的方法。 该方法包括从第一寄存器文件读取数据，同时从第二寄存器堆读取数据。 第一寄存器文件与第一指令流相关联，并且第二寄存器文件与第二指令流相关联。 第一指令流在处理器的执行流水线中与第二指令流相顺序，并且第一寄存器文件相对于第二寄存器文件位于非相邻位置。
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公开(公告)号：US08725991B2
公开(公告)日：2014-05-13
申请号：US11853866
申请日：2007-09-12
申请人： Lin Wang , Masud Kamal , Paul Bassett , Suresh Venkumahanti , Jian Shen
发明人： Lin Wang , Masud Kamal , Paul Bassett , Suresh Venkumahanti , Jian Shen
CPC分类号： G06F9/3851 , G06F9/30123 , G06F9/30141 , G06F13/4252 , Y02D10/14 , Y02D10/151
摘要： The present disclosure includes a multi-threaded processor that includes a first register file associated with a first thread and a second register file associated with a second thread. At least one hardware resource is shared by the first and second register files. In addition, the first thread may have a pipeline access position that is non-sequential to the second thread. A method of accessing a plurality of register files is also disclosed. The method includes reading data from a first register file while concurrently reading data from a second register file. The first register file is associated with a first instruction stream and the second register file is associated with a second instruction stream. The first instruction stream is sequential to the second instruction stream in an execution pipeline of a processor, and the first register file is in a non-adjacent location with respect to the second register file.
摘要翻译： 本公开包括多线程处理器，其包括与第一线程相关联的第一寄存器文件和与第二线程相关联的第二寄存器文件。 至少一个硬件资源由第一和第二寄存器文件共享。 此外，第一线程可以具有与第二线程不连续的管线访问位置。 还公开了一种访问多个寄存器文件的方法。 该方法包括从第一寄存器文件读取数据，同时从第二寄存器堆读取数据。 第一寄存器文件与第一指令流相关联，并且第二寄存器文件与第二指令流相关联。 第一指令流在处理器的执行流水线中与第二指令流相顺序，并且第一寄存器文件相对于第二寄存器文件位于非相邻位置。
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公开(公告)号：US08145874B2
公开(公告)日：2012-03-27
申请号：US12037300
申请日：2008-02-26
申请人： Suresh Venkumahanti , Lucian Codrescu , Lin Wang
发明人： Suresh Venkumahanti , Lucian Codrescu , Lin Wang
CPC分类号： G06F9/3851 , G06F9/34 , G06F9/3824 , G06F9/3828 , G06F9/3885
摘要： In an embodiment, a method is disclosed that includes, comparing, during a write back stage at an execution unit, a write identifier associated with a result to be written to a register file from execution of a first instruction to a read identifier associated with a second instruction at an execution pipeline within an interleaved multi-threaded (IMT) processor having multiple execution units. When the write identifier matches the read identifier, the method further includes storing the result at a local memory of the execution unit for use by the execution unit in the subsequent read stage.
摘要翻译： 在一个实施例中，公开了一种方法，其包括：在执行单元的回写阶段期间，将与将被写入寄存器文件的结果相关联的写入标识符从执行第一指令到与第一指令相关联的读取标识符进行比较 在具有多个执行单元的交错多线程（IMT）处理器内的执行流水线处的第二指令。 当写入标识符与读取标识符匹配时，该方法还包括将结果存储在执行单元的本地存储器中，供执行单元在随后的读取阶段中使用。
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公开(公告)号：US07979681B2
公开(公告)日：2011-07-12
申请号：US11943190
申请日：2007-11-20
IPC分类号： G06F9/00
CPC分类号： G06F9/30101 , G06F9/30072 , G06F9/30112 , G06F9/30141 , G06F9/3016 , G06F9/3824
摘要： In a particular embodiment, a method is disclosed that includes identifying a first block of bits within a result to be written to a destination register by an execution unit. The result includes a plurality of bits having the first block of bits and a second block of bits. The first block of bits has a value of zero. The method further includes providing an encoded bit value representing the first block of bits to a control register and selectively writing the second block of bits, but not the first block of bits, to the destination register. The destination register is sized to receive the first and second blocks of bits.
摘要翻译： 在特定实施例中，公开了一种方法，其包括通过执行单元识别要写入到目的地寄存器的结果内的第一比特块。 结果包括具有第一比特块和第二比特块的多个比特。 第一个位块的值为零。 该方法还包括向控制寄存器提供表示第一比特位的编码比特值，并将第二比特块而不是第一比特块写入目的寄存器。 目的地寄存器的大小适于接收第一和第二位块。
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公开(公告)号：US20090132793A1
公开(公告)日：2009-05-21
申请号：US11943190
申请日：2007-11-20
IPC分类号： G06F9/30
CPC分类号： G06F9/30101 , G06F9/30072 , G06F9/30112 , G06F9/30141 , G06F9/3016 , G06F9/3824
摘要： In a particular embodiment, a method is disclosed that includes identifying a first block of bits within a result to be written to a destination register by an execution unit. The result includes a plurality of bits having the first block of bits and a second block of bits. The first block of bits has a value of zero. The method further includes providing an encoded bit value representing the first block of bits to a control register and selectively writing the second block of bits, but not the first block of bits, to the destination register. The destination register is sized to receive the first and second blocks of bits.
摘要翻译： 在特定实施例中，公开了一种方法，其包括通过执行单元识别要写入到目的地寄存器的结果内的第一比特块。 结果包括具有第一比特块和第二比特块的多个比特。 第一个位块的值为零。 该方法还包括向控制寄存器提供表示第一比特位的编码比特值，并将第二比特块而不是第一比特块写入目的寄存器。 目的地寄存器的大小适于接收第一和第二位块。
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公开(公告)号：US08848569B2
公开(公告)日：2014-09-30
申请号：US13576397
申请日：2010-05-17
申请人： Lin Wang , Peng Zhang , Liping Wang
发明人： Lin Wang , Peng Zhang , Liping Wang
CPC分类号： H04L1/1822 , H04W52/20 , H04W52/221 , H04W52/362 , H04W52/48
摘要： The disclosure discloses a method and device for power control in non-adaptive retransmission. The solution thereof includes: when UE does not obtain a TPC adjustment value of a current HARQ process by parsing, determining a current power control mode; if the mode is an accumulation mode, determining whether the calculated sum of TPC adjustment values of each HARQ process is smaller than a given threshold, if yes, obtaining a transmission power by adding an increment adjustment value to a retransmission power, otherwise, calculating the transmission power of UE according to a formula in a protocol; if the mode is an absolute value mode, obtaining a transmission power by adding an increment adjustment value to a retransmission power. The solution can improve the SINR detected by an eNB and improve a retransmission success rate, thereby saving radio resources, facilitating utilization of radio resources and reduction of transmission delay, improving the throughput rate of an LTE system and improving the system performance.
摘要翻译： 本公开公开了一种用于非自适应重传中的功率控制的方法和装置。 其解决方案包括：当UE不通过解析获得当前HARQ进程的TPC调整值时，确定当前功率控制模式; 如果模式是累加模式，则确定所计算的每个HARQ过程的TPC调整值的和是否小于给定阈值，如果是，则通过将增量调整值与重发功率相加来获得发送功率，否则，计算 UE根据协议中的公式发送功率; 如果模式是绝对值模式，则通过将增量调整值与重发功率相加来获得发送功率。 该方案可以提高基站检测到的SINR，提高重发成功率，节省无线资源，便于利用无线资源，减少传输延迟，提高LTE系统吞吐率，提高系统性能。
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公开(公告)号：US08838703B2
公开(公告)日：2014-09-16
申请号：US12456223
申请日：2009-06-12
申请人： Xuqiang Yue , Lin Wang , Zhenwei Yao , Zuohong Liu , Xianjie Zeng
发明人： Xuqiang Yue , Lin Wang , Zhenwei Yao , Zuohong Liu , Xianjie Zeng
CPC分类号： H04L51/04 , G06F17/30699 , H04L67/26
摘要： Processing a message includes receiving at a message processing system the message that is distributed by a message distributor, the message having a message type, based at least in part on the message type, locating among a plurality of subscriber groups a subscriber group that subscribes to the message type, each of the plurality of subscriber groups having a unique identifier and comprising one or more message subscriber nodes, at least some of the one or more message subscriber nodes in each of the plurality of subscriber groups being connected to the message processing system, and transmitting the message to a message subscriber node that belongs to the subscriber group that is located.
摘要翻译： 处理消息包括在消息处理系统处接收由消息分发者分发的消息，消息具有消息类型，至少部分地基于消息类型，在多个订阅者组之间定位订阅订阅者的订阅者组 所述消息类型，所述多个订户组中的每一个具有唯一标识符并且包括一个或多个消息订户节点，所述多个用户组中的每一个中的至少一个消息订户节点连接到所述消息处理系统 ，并将消息发送到属于所述用户组的消息订户节点。
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公开(公告)号：US08479324B2
公开(公告)日：2013-07-09
申请号：US12619841
申请日：2009-11-17
申请人： Zhongmin Chen , Pengcheng Gao , Lin Wang
发明人： Zhongmin Chen , Pengcheng Gao , Lin Wang
IPC分类号： E03D13/00
CPC分类号： E03D5/105
摘要： The present invention discloses a urinal with a conductivity sensor, which includes the conductivity sensor arranged at the location where a reservoir of the urinal is curved and adapted to detect urine, a control unit (MCU), a power battery, and an electromagnetic valve adapted to control a discharge of water, wherein the conductivity sensor is adapted to detect a conductivity to determine whether urine is present. After the conductivity sensor detects presence of urine, the control unit opens the electromagnetic valve. The conductivity sensor includes electrodes dipped inside the location where the reservoir is curved to contact urine. The conductivity sensor further includes an anti-polarization-of-electrode circuit based upon the principle of an alternating power supply. Thus, the sensor can achieve more reliable sensing and a longer lifetime.
摘要翻译： 本发明公开了一种具有电导率传感器的小便池，其包括布置在小便池的容器弯曲并适于检测尿液的位置处的电导率传感器，控制单元（MCU），动力电池和电磁阀 以控制水的排放，其中所述电导率传感器适于检测导电性以确定是否存在尿。 在电导率传感器检测到尿液的存在之后，控制单元打开电磁阀。 电导率传感器包括浸在容器弯曲接触尿液的位置内的电极。 电导率传感器还包括基于交流电源的原理的反极化电极电路。 因此，传感器可以实现更可靠的感测和更长的寿命。
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9.发明授权Dicycloazaalkane derivatives, preparation processes and medical uses thereof 有权二环烷基烷烃衍生物，其制备方法和医疗用途公开(公告)号：US08415349B2
公开(公告)日：2013-04-09
申请号：US13619138
申请日：2012-09-14
申请人： Peng Cho Tang , Zhigang Lin , Hejun Lü , Fuqiang Zhao , Li Li , Fanglong Yang , Jianghong Fu , Lin Wang , Guangyuan Shen , Dongliang Guan
发明人： Peng Cho Tang , Zhigang Lin , Hejun Lü , Fuqiang Zhao , Li Li , Fanglong Yang , Jianghong Fu , Lin Wang , Guangyuan Shen , Dongliang Guan
IPC分类号： A61K31/5377 , A61K31/403 , A61K31/454 , C07D403/12 , C07D401/14 , C07D413/14
CPC分类号： C07D209/52 , C07D403/12
摘要： The invention provides derivatives of azabicyclo alkane having formula (ID), and the method for making them, wherein each substitute in formula (ID) is same as defined in the description.
摘要翻译： 本发明提供具有式（ID）的氮杂双环烷烃衍生物及其制备方法，其中式（ID）中的每个取代基与说明书中定义相同。
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公开(公告)号：US20120288477A1
公开(公告)日：2012-11-15
申请号：US13555930
申请日：2012-07-23
申请人： Lin Wang
发明人： Lin Wang
CPC分类号： C07K14/555 , A61K38/00 , A61K47/60
摘要： The invention relates to variants of consensus interferon protein with improved properties, such as improved anti-viral activity, and use thereof The variants are also easier to renature after denaturant treatment. The invention also relates to the preparation method of the variants consensus interferon.
摘要翻译： 本发明涉及具有改善的性质的复合干扰素蛋白质的变体，例如改进的抗病毒活性及其用途。变体在变性剂处理后也更容易变性。 本发明还涉及变体复合干扰素的制备方法。
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