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公开(公告)号:US08476698B2
公开(公告)日:2013-07-02
申请号:US12709114
申请日:2010-02-19
申请人: Lingpeng Guan , Anup Bhalla , Tinggang Zhu , Madhur Bobde
发明人: Lingpeng Guan , Anup Bhalla , Tinggang Zhu , Madhur Bobde
IPC分类号: H01L29/72
CPC分类号: H01L29/7823 , H01L29/0634 , H01L29/0638 , H01L29/0696 , H01L29/1095 , H01L29/402 , H01L29/404 , H01L29/47 , H01L29/7811
摘要: A superjunction device and methods for layout design and fabrication of a superjunction device are disclosed. A layout of active cell column structures can be configured so that a charge due to first conductivity type dopants balances out charge due to second conductivity type dopants in a doped layer in an active cell region. A layout of end portions of the active cell column structures proximate termination column structures can be configured so that a charge due to the first conductivity type dopants in the end portions and a charge due to the first conductivity type dopants in the termination column structures balances out charge due to the second conductivity type dopants in a portion of the doped layer between the termination column structures and the end portions.
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公开(公告)号:US20110049564A1
公开(公告)日:2011-03-03
申请号:US12584151
申请日:2009-08-31
申请人: Lingpeng Guan , Anup Bhalla , Madhur Bobde , Tinggang Zhu
发明人: Lingpeng Guan , Anup Bhalla , Madhur Bobde , Tinggang Zhu
IPC分类号: H01L29/78 , H01L29/739 , H01L21/336 , H01L21/331
CPC分类号: H01L29/66712 , H01L29/0619 , H01L29/0634 , H01L29/1095 , H01L29/402 , H01L29/66325 , H01L29/7395 , H01L29/7806 , H01L29/7811 , H01L29/872
摘要: This invention discloses a method for manufacturing a semiconductor power device in a semiconductor substrate comprises an active cell area and a termination area. The method comprises the steps of a) growing and patterning a field oxide layer in the termination area and also in the active cell area on a top surface of the semiconductor substrate b) depositing and patterning a polysilicon layer on the top surface of the semiconductor substrate at a gap distance away from the field oxide layer; c) performing a blank body dopant implant to form body dopant regions in the semiconductor substrate substantially aligned with the gap area followed by diffusing the body dopant regions into body regions in the semiconductor substrate; d) implanting high concentration body-dopant regions encompassed in and having a higher dopant concentration than the body regions and e) applying a source mask to implant source regions having a conductivity opposite to the body region with the source regions encompassed in the body regions and surrounded by the high concentration body-dopant regions.
摘要翻译: 本发明公开了一种在半导体衬底中制造半导体功率器件的方法,包括有源电池区域和端接区域。 该方法包括以下步骤:a)在终端区域以及半导体衬底的顶表面上的活性单元区域中生长和构图场氧化物层b)在半导体衬底的顶表面上沉积并构图多晶硅层 在距离场氧化物层的间隙距离处; c)执行空白体掺杂剂注入以在所述半导体衬底中形成与所述间隙区基本对准的体掺杂区,随后将所述体掺杂区扩散到所述半导体衬底中的体区; d)植入包含在并且具有比身体区域更高的掺杂剂浓度的高浓度体 - 掺杂剂区域,以及e)将源掩模施加到具有与身体区域相反的导电性的源区域,其中源区域包含在身体区域中, 被高浓度体 - 掺杂区域包围。
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公开(公告)号:US20170213887A1
公开(公告)日:2017-07-27
申请号:US15479281
申请日:2017-04-05
申请人: Lingpeng Guan , Anup Bhalla , Madhur Bobde , Tinggang Zhu
发明人: Lingpeng Guan , Anup Bhalla , Madhur Bobde , Tinggang Zhu
IPC分类号: H01L29/06 , H01L29/78 , H01L29/10 , H01L29/739 , H01L29/49 , H01L29/872
CPC分类号: H01L29/0634 , H01L29/0619 , H01L29/0834 , H01L29/1095 , H01L29/404 , H01L29/42368 , H01L29/4916 , H01L29/512 , H01L29/66333 , H01L29/66712 , H01L29/7393 , H01L29/7395 , H01L29/7806 , H01L29/7811 , H01L29/872
摘要: This invention discloses a method for manufacturing a semiconductor power device in a semiconductor substrate comprises an active cell area and a termination area. The method comprises the steps of a) growing and patterning a field oxide layer in the termination area and also in the active cell area on a top surface of the semiconductor substrate b) depositing and patterning a polysilicon layer on the top surface of the semiconductor substrate at a gap distance away from the field oxide layer; c) performing a blank body dopant implant to form body dopant regions in the semiconductor substrate substantially aligned with the gap area followed by diffusing the body dopant regions into body regions in the semiconductor substrate; d) implanting high concentration body-dopant regions encompassed in and having a higher dopant concentration than the body regions and e) applying a source mask to implant source regions having a conductivity opposite to the body region with the source regions encompassed in the body regions and surrounded by the high concentration body-dopant regions.
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4.
公开(公告)号:US20160043169A1
公开(公告)日:2016-02-11
申请号:US14454696
申请日:2014-08-07
申请人: Lingpeng Guan , Anup Bhalla , Madhur Bobde , Tinggang Zhu
发明人: Lingpeng Guan , Anup Bhalla , Madhur Bobde , Tinggang Zhu
CPC分类号: H01L29/0634 , H01L29/0619 , H01L29/0834 , H01L29/1095 , H01L29/404 , H01L29/42368 , H01L29/4916 , H01L29/512 , H01L29/66333 , H01L29/66712 , H01L29/7393 , H01L29/7395 , H01L29/7806 , H01L29/7811 , H01L29/872
摘要: This invention discloses a method for manufacturing a semiconductor power device in a semiconductor substrate comprises an active cell area and a termination area. The method comprises the steps of a) growing and patterning a field oxide layer in the termination area and also in the active cell area on a top surface of the semiconductor substrate b) depositing and patterning a polysilicon layer on the top surface of the semiconductor substrate at a gap distance away from the field oxide layer; c) performing a blank body dopant implant to form body dopant regions in the semiconductor substrate substantially aligned with the gap area followed by diffusing the body dopant regions into body regions in the semiconductor substrate; d) implanting high concentration body-dopant regions encompassed in and having a higher dopant concentration than the body regions and e) applying a source mask to implant source regions having a conductivity opposite to the body region with the source regions encompassed in the body regions and surrounded by the high concentration body-dopant regions.
摘要翻译: 本发明公开了一种在半导体衬底中制造半导体功率器件的方法,包括有源电池区域和端接区域。 该方法包括以下步骤:a)在终端区域以及半导体衬底的顶表面上的活性单元区域中生长和构图场氧化物层b)在半导体衬底的顶表面上沉积并构图多晶硅层 在距离场氧化物层的间隙距离处; c)执行空白体掺杂剂注入以在所述半导体衬底中形成与所述间隙区基本对准的体掺杂区,随后将所述体掺杂区扩散到所述半导体衬底中的体区; d)植入包含在并且具有比身体区域更高的掺杂剂浓度的高浓度体 - 掺杂剂区域,以及e)将源掩模施加到具有与身体区域相反的导电性的源极区域,其中源区域包含在身体区域中, 被高浓度体 - 掺杂区域包围。
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公开(公告)号:US20130277740A1
公开(公告)日:2013-10-24
申请号:US13923065
申请日:2013-06-20
申请人: Lingpeng Guan , Anup Bhalla , Tinggang Zhu , Madhur Bobde
发明人: Lingpeng Guan , Anup Bhalla , Tinggang Zhu , Madhur Bobde
IPC分类号: H01L29/78
CPC分类号: H01L29/7823 , H01L29/0634 , H01L29/0638 , H01L29/0696 , H01L29/1095 , H01L29/402 , H01L29/404 , H01L29/47 , H01L29/7811
摘要: A superjunction device and methods for layout design and fabrication of a superjunction device are disclosed. A layout of active cell column structures can be configured so that a charge due to first conductivity type dopants balances out charge due to second conductivity type dopants in a doped layer in an active cell region. A layout of end portions of the active cell column structures proximate termination column structures can be configured so that a charge due to the first conductivity type dopants in the end portions and a charge due to the first conductivity type dopants in the termination column structures balances out charge due to the second conductivity type dopants in a portion of the doped layer between the termination column structures and the end portions.
摘要翻译: 公开了一种用于布置设计和超级结装置制造的超结装置和方法。 可以配置活性单元列结构的布局,使得由于第一导电型掺杂剂引起的电荷由于活性单元区域中的掺杂层中的第二导电类型掺杂物而平衡电荷。 靠近端子列结构的活性单元列结构的端部的布局可以被配置为使得由于端部中的第一导电类型掺杂物引起的电荷和由端接塔结构中的第一导电类型掺杂剂引起的电荷平衡 在终端柱结构和端部之间的掺杂层的一部分中的第二导电类型掺杂剂引起的电荷。
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公开(公告)号:US09620584B2
公开(公告)日:2017-04-11
申请号:US14454696
申请日:2014-08-07
申请人: Lingpeng Guan , Anup Bhalla , Madhur Bobde , Tinggang Zhu
发明人: Lingpeng Guan , Anup Bhalla , Madhur Bobde , Tinggang Zhu
IPC分类号: H01L29/78 , H01L29/06 , H01L29/66 , H01L29/739
CPC分类号: H01L29/0634 , H01L29/0619 , H01L29/0834 , H01L29/1095 , H01L29/404 , H01L29/42368 , H01L29/4916 , H01L29/512 , H01L29/66333 , H01L29/66712 , H01L29/7393 , H01L29/7395 , H01L29/7806 , H01L29/7811 , H01L29/872
摘要: This invention discloses a method for manufacturing a semiconductor power device in a semiconductor substrate comprises an active cell area and a termination area. The method comprises the steps of a) growing and patterning a field oxide layer in the termination area and also in the active cell area on a top surface of the semiconductor substrate b) depositing and patterning a polysilicon layer on the top surface of the semiconductor substrate at a gap distance away from the field oxide layer; c) performing a blank body dopant implant to form body dopant regions in the semiconductor substrate substantially aligned with the gap area followed by diffusing the body dopant regions into body regions in the semiconductor substrate; d) implanting high concentration body-dopant regions encompassed in and having a higher dopant concentration than the body regions and e) applying a source mask to implant source regions having a conductivity opposite to the body region with the source regions encompassed in the body regions and surrounded by the high concentration body-dopant regions.
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公开(公告)号:US20110204442A1
公开(公告)日:2011-08-25
申请号:US12709114
申请日:2010-02-19
申请人: Lingpeng Guan , Anup Bhalla , Tinggang Zhu , Madhur Bobde
发明人: Lingpeng Guan , Anup Bhalla , Tinggang Zhu , Madhur Bobde
CPC分类号: H01L29/7823 , H01L29/0634 , H01L29/0638 , H01L29/0696 , H01L29/1095 , H01L29/402 , H01L29/404 , H01L29/47 , H01L29/7811
摘要: A superjunction device and methods for layout design and fabrication of a superjunction device are disclosed. A layout of active cell column structures can be configured so that a charge due to first conductivity type dopants balances out charge due to second conductivity type dopants in a doped layer in an active cell region. A layout of end portions of the active cell column structures proximate termination column structures can be configured so that a charge due to the first conductivity type dopants in the end portions and a charge due to the first conductivity type dopants in the termination column structures balances out charge due to the second conductivity type dopants in a portion of the doped layer between the termination column structures and the end portions.
摘要翻译: 公开了一种用于布置设计和超级结装置制造的超结装置和方法。 可以配置活性单元列结构的布局,使得由于第一导电型掺杂剂引起的电荷由于活性单元区域中的掺杂层中的第二导电类型掺杂物而平衡电荷。 靠近端子列结构的活性单元列结构的端部的布局可以被配置为使得由于端部中的第一导电类型掺杂物引起的电荷和由端接塔结构中的第一导电类型掺杂剂引起的电荷平衡 在终端柱结构和端部之间的掺杂层的一部分中的第二导电类型掺杂剂引起的电荷。
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公开(公告)号:US09876073B2
公开(公告)日:2018-01-23
申请号:US15479281
申请日:2017-04-05
申请人: Lingpeng Guan , Anup Bhalla , Madhur Bobde , Tinggang Zhu
发明人: Lingpeng Guan , Anup Bhalla , Madhur Bobde , Tinggang Zhu
IPC分类号: H01L29/06 , H01L29/78 , H01L29/49 , H01L29/872 , H01L29/10 , H01L29/739
CPC分类号: H01L29/0634 , H01L29/0619 , H01L29/0834 , H01L29/1095 , H01L29/404 , H01L29/42368 , H01L29/4916 , H01L29/512 , H01L29/66333 , H01L29/66712 , H01L29/7393 , H01L29/7395 , H01L29/7806 , H01L29/7811 , H01L29/872
摘要: This invention discloses a method for manufacturing a semiconductor power device in a semiconductor substrate comprises an active cell area and a termination area. The method comprises the steps of a) growing and patterning a field oxide layer in the termination area and also in the active cell area on a top surface of the semiconductor substrate b) depositing and patterning a polysilicon layer on the top surface of the semiconductor substrate at a gap distance away from the field oxide layer; c) performing a blank body dopant implant to form body dopant regions in the semiconductor substrate substantially aligned with the gap area followed by diffusing the body dopant regions into body regions in the semiconductor substrate; d) implanting high concentration body-dopant regions encompassed in and having a higher dopant concentration than the body regions and e) applying a source mask to implant source regions having a conductivity opposite to the body region with the source regions encompassed in the body regions and surrounded by the high concentration body-dopant regions.
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公开(公告)号:US08829614B2
公开(公告)日:2014-09-09
申请号:US12584151
申请日:2009-08-31
申请人: Lingpeng Guan , Anup Bhalla , Madhur Bobde , Tinggang Zhu
发明人: Lingpeng Guan , Anup Bhalla , Madhur Bobde , Tinggang Zhu
IPC分类号: H01L27/12
CPC分类号: H01L29/66712 , H01L29/0619 , H01L29/0634 , H01L29/1095 , H01L29/402 , H01L29/66325 , H01L29/7395 , H01L29/7806 , H01L29/7811 , H01L29/872
摘要: This invention discloses a method for manufacturing a semiconductor power device in a semiconductor substrate comprises an active cell area and a termination area. The method comprises the steps of a) growing and patterning a field oxide layer in the termination area and also in the active cell area on a top surface of the semiconductor substrate b) depositing and patterning a polysilicon layer on the top surface of the semiconductor substrate at a gap distance away from the field oxide layer; c) performing a blank body dopant implant to form body dopant regions in the semiconductor substrate substantially aligned with the gap area followed by diffusing the body dopant regions into body regions in the semiconductor substrate; d) implanting high concentration body-dopant regions encompassed in and having a higher dopant concentration than the body regions and e) applying a source mask to implant source regions having a conductivity opposite to the body region with the source regions encompassed in the body regions and surrounded by the high concentration body-dopant regions.
摘要翻译: 本发明公开了一种在半导体衬底中制造半导体功率器件的方法,包括有源电池区域和端接区域。 该方法包括以下步骤:a)在终端区域以及半导体衬底的顶表面上的活性单元区域中生长和构图场氧化物层b)在半导体衬底的顶表面上沉积和构图多晶硅层 在距离场氧化物层的间隙距离处; c)执行空白体掺杂剂注入以在所述半导体衬底中形成与所述间隙区基本对准的体掺杂区,随后将所述体掺杂区扩散到所述半导体衬底中的体区; d)植入包含在并且具有比身体区域更高的掺杂剂浓度的高浓度体 - 掺杂剂区域,以及e)将源掩模施加到具有与身体区域相反的导电性的源极区域,其中源区域包含在身体区域中, 被高浓度体 - 掺杂区域包围。
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10.
公开(公告)号:US20160005809A1
公开(公告)日:2016-01-07
申请号:US14298537
申请日:2014-06-06
申请人: Madhur Bobde , Lingpeng Guan , Anup Bhalla , Hamza Yilmaz
发明人: Madhur Bobde , Lingpeng Guan , Anup Bhalla , Hamza Yilmaz
IPC分类号: H01L29/06 , H01L21/761
CPC分类号: H01L29/0634 , H01L21/26513 , H01L21/761 , H01L29/0615 , H01L29/0619 , H01L29/6609 , H01L29/861
摘要: This invention discloses a semiconductor power device disposed in a semiconductor substrate and having an active cell area and an edge termination area the edge termination area wherein the edge termination area comprises a superjunction structure having doped semiconductor columns of alternating conductivity types with a charge imbalance between the doped semiconductor columns to generate a saddle junction electric field in the edge termination.
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