摘要:
An input/output (I/O) device includes a host interface for connection to a host device having a memory and a network interface, which is configured to receive, over a network, data packets associated with I/O operations directed to specified virtual addresses in the memory. Packet processing hardware is configured to translate the virtual addresses into physical addresses and to perform the I/O operations using the physical addresses, and upon an occurrence of a page fault in translating one of the virtual addresses, to transmit a response packet over the network to a source of the data packets so as to cause the source to refrain from transmitting further data packets while the page fault is serviced.
摘要:
A communication method in a network operating in accordance with a standard that allocates a given number of bits m for layer-2 addressing of nodes in the network. The method includes accepting at a layer-2 switch in the network an assignment to one or more nodes in the network of respective layer-2 extended addresses, each including n=m+k bits, k>0. A given data packet is received at the switch for forwarding. The given data packet includes a layer-2 destination address and a layer-3 destination address in accordance with the standard. The layer-3 destination address includes t bits, t≧k. The given data packet is forwarded from the switch to one of the nodes by reading from the given data packet and combining the layer-2 destination address and k bits from the layer-3 destination address so as to reconstruct the n bits of the extended layer-2 address of the one of the nodes.
摘要:
A communication method in a network operating in accordance with a standard that allocates a given number of bits m for layer-2 addressing of nodes in the network. The method includes accepting at a layer-2 switch in the network an assignment to one or more nodes in the network of respective layer-2 extended addresses, each including n=m+k bits, k>0. A given data packet is received at the switch for forwarding. The given data packet includes a layer-2 destination address and a layer-3 destination address in accordance with the standard. The layer-3 destination address includes t bits, t≧k. The given data packet is forwarded from the switch to one of the nodes by reading from the given data packet and combining the layer-2 destination address and k bits from the layer-3 destination address so as to reconstruct the n bits of the extended layer-2 address of the one of the nodes.
摘要:
An input/output (I/O) device includes a host interface for connection to a host device having a memory and a network interface, which is configured to receive, over a network, data packets associated with I/O operations directed to specified virtual addresses in the memory. Packet processing hardware is configured to translate the virtual addresses into physical addresses and to perform the I/O operations using the physical addresses, and upon an occurrence of a page fault in translating one of the virtual addresses, to transmit a response packet over the network to a source of the data packets so as to cause the source to refrain from transmitting further data packets while the page fault is serviced.
摘要:
A network interface adapter includes an outgoing packet generator, adapted to generate an outgoing request packet for delivery to a remote responder responsive to a request submitted by a host processor and a network output port, coupled to transmit the outgoing request packet over a network to the remote responder. A network input port receives an incoming response packet from the remote responder, in response to the outgoing request packet sent thereto, as well as an incoming request packet sent by a remote requester. An incoming packet processor receives and processes both the incoming response packet and the incoming request packet, and causes the outgoing packet generator, responsive to the incoming request packet, to generate, in addition to the outgoing request packet, an outgoing response packet for transmission to the remote requester.
摘要:
An interface adapter for a packet network includes a first plurality of execution engines, coupled to a host interface so as to read from a memory work items corresponding to messages to be sent over the network, and to generate gather entries defining packets to be transmitted over the network responsive to the work items. A scheduling processor assigns the work items to the execution engines for generation of the gather entries. Switching circuitry couples the execution engines to a plurality of gather engines, which generate the packets responsive to the gather entries.
摘要:
A network interface device includes a fabric interface, adapted to exchange messages over a switch fabric with a plurality of host processors, the messages containing data, and a network interface, including one or more ports adapted to be coupled to a network external to the switch fabric. Message processing circuitry is coupled between the fabric interface and the network interface, so as to enable at least first and second host processors among the plurality of the host processors to use a single one of the ports substantially simultaneously so as to transmit and receive frames containing the data over the network.
摘要:
A method of direct memory access (DMA) includes receiving a first notification at a DMA engine that a first list of descriptors has been prepared, each of the descriptors in the list including an instruction for execution by the DMA engine and a link to a succeeding one of the descriptors, except for a final descriptor in the list, which has a null link. The DMA engine reads and executes the descriptors in the first list. When the DMA engine receives a second notification that a second list of the descriptors has been prepared, it rereads at least a part of the final descriptor in the first list to determine a changed value of the link, indicating a first descriptor in the second list. It then reads and executes the descriptors in the second list responsive to the changed value of the link.
摘要:
A method for communication includes allocating in a memory of a host device a contiguous, cyclical set of buffers for use by a transport service instance on a network interface controller (NIC). First and second indices point respectively to a first buffer in the set to which the NIC is to write and a second buffer in the set from which a client process running on the host device is to read. Upon receiving at the NIC a message directed to the transport service instance and containing data to be pushed to the memory, the data are written to the first buffer that is pointed to by the first index, and the first index is advanced cyclically through the set. The second index is advanced cyclically through the set when the data in the second buffer have been read by the client process.
摘要:
A method for static rate flow control includes receiving a sequence of data packets for transmission over a network, including at least first and second packets having a common destination address on the network, the first and second packets having respective first and second lengths, and transmitting the first packet to the destination address. Responsive to transmitting the first packet, an entry is placed in a flow control table, and a timeout period is set for the entry responsive to the first length. The second packet is transmitted only after the timeout period has expired.