公开(公告)号：US20240005978A1

公开(公告)日：2024-01-04

申请号：US18218434

申请日：2023-07-05

申请人： Lodestar Licensing Group, LLC

发明人： Fuad Badrieh ,  Thomas H. Kinsley ,  Baekkyu Choi

IPC分类号： G11C11/4074

CPC分类号： G11C11/4074

摘要： Techniques, apparatus, and devices for managing power in a memory die are described. A memory die may include an array of memory cells and one or more voltage sensors. Each voltage sensor may be on the same substrate as the array of memory cells and may sense a voltage at a location associated with the array. The voltage sensors may generate one or more analog voltage signals that may be converted to one or more digital signals on the memory die. In some cases, the analog voltage signals may be converted to digital signals using an oscillator and a counter on the memory die. The digital signal may be provided to a power management integrated circuit (PMIC), which may adjust a voltage supplied to the array based on the digital signal.

公开(公告)号：US20240096425A1

公开(公告)日：2024-03-21

申请号：US18218436

申请日：2023-07-05

申请人： Lodestar Licensing Group, LLC

发明人： Baekkyu Choi ,  Fuad Badrieh ,  Thomas H. Kinsley

IPC分类号： G11C16/30 ,  G11C5/14

CPC分类号： G11C16/30 ,  G11C5/145 ,  G11C5/147

摘要： Methods, systems, and devices for power regulation for memory systems are described. In one example, a memory system, such as a memory module, may include a substrate, and an input/output component coupled with the substrate and operable to communicate signals with a host system. The memory system may also include one or more memory devices coupled with the substrate and the input/output component and operable to store data for the host system. A memory device of the one or more memory devices may include a power management component in its package with one or more memory dies. The power management component may be coupled with the one or more memory dies, and feedback component, and may be operable to provide one or more supply voltages for the one or more memory dies based on one or more voltages associated with the memory system.

公开(公告)号：US20240077926A1

公开(公告)日：2024-03-07

申请号：US18218443

申请日：2023-07-05

申请人： Lodestar Licensing Group, LLC

发明人： Baekkyu Choi ,  Thomas H. Kinsley ,  Fuad Badrieh

IPC分类号： G06F1/3225

CPC分类号： G06F1/3225 ,  G06F1/30

摘要： A memory device may include a pin for communicating feedback regarding a supply voltage to a power management component, such as a power management integrated circuit (PMIC). The memory device may bias the pin to a first voltage indicating that a supply voltage is within a target range. The memory device may subsequently determine that a supply voltage is outside the target range and transition the voltage at the pin from the first voltage to a second voltage indicating that the supply voltage is outside the target range. The memory device may select the second voltage based on whether the supply voltage is above or below the target range.