DRIVER CIRCUIT FOR EVALUATION OF AN OPTICAL EMITTER

    公开(公告)号:US20230051475A1

    公开(公告)日:2023-02-16

    申请号:US17451742

    申请日:2021-10-21

    Abstract: A driver circuit may include an optical emitter, a capacitive element, and an inductive element. The driver circuit may include a first switch that, in a closed state, is to cause charging of the inductive element, and when transitioning from the closed state to an open state is to cause discharging of the inductive element to charge the capacitive element. The driver circuit may include a second switch that in a closed state is to cause discharging of the capacitive element to provide an electrical pulse to the optical emitter. The driver circuit may include a signal generator configured to generate a first signal for controlling the open state and the closed state of the first switch, and a pulse shortening element configured to shorten a pulse width of the first signal to generate a second signal for controlling the open state and the closed state of the second switch.

    DRIVER CIRCUIT FOR AN ADDRESSABLE ARRAY OF OPTICAL EMITTERS

    公开(公告)号:US20220299604A1

    公开(公告)日:2022-09-22

    申请号:US17304074

    申请日:2021-06-14

    Abstract: In some implementations, a driver circuit may include a source to provide an electrical input and an array of optical emitters arranged in one or more rows and one or more columns. The array of optical emitters may include an optical emitter associated with a row of the one or more rows and a column of the one or more columns. The driver circuit may include a first switch having an open state and a closed state and a capacitive element connected to the row. The first switch in the closed state may cause charging of the capacitive element. The driver circuit may include a second switch having an open state and a closed state. The second switch in the closed state may select the column, and may cause discharging of the capacitive element through the row and the column to provide an electrical pulse to the optical emitter.

    PROBE TIP ASSEMBLY
    3.
    发明申请

    公开(公告)号:US20220229091A1

    公开(公告)日:2022-07-21

    申请号:US17360260

    申请日:2021-06-28

    Abstract: In some implementations, a probe tip assembly includes a driver printed circuit board assembly (PCBA) and a probe tip subassembly. The probe tip subassembly includes a plurality of probe tips, wherein a probe tip, of the plurality of probe tips, extends beyond an end of the PCBA, and the PCBA and the probe tip are configured to transmit an electric signal to test an optical component. The probe tip may include a material comprising at least one of copper (Cu), a beryllium copper (BeCu) alloy, tungsten (W), Paliney, Neyoro, and/or another conductive material.

    WAFER PROBER TO FACILITATE TESTING OF A WAFER USING NANOSECOND PULSES

    公开(公告)号:US20210325451A1

    公开(公告)日:2021-10-21

    申请号:US16917124

    申请日:2020-06-30

    Abstract: A wafer testing system may comprise a chuck, a wafer carrier, a cathode plate, and a probe card. The chuck may be configured to hold the wafer carrier. The wafer carrier may be configured to hold a wafer on a surface of the wafer carrier, wherein the surface of the wafer carrier comprises one or more contact features protruding from the surface of the wafer carrier. The cathode plate may be configured to provide an electrical connection between the wafer carrier and the probe card, wherein a portion of a surface of the cathode plate is configured to be disposed on the one or more contact features of the wafer carrier. The probe card may be configured to test, using one or more probes associated with the probe card, the wafer when the wafer is on the surface of the wafer carrier.

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