MEMORY DEVICE AND MANUFACTURING METHOD THEREOF

    公开(公告)号:US20220399361A1

    公开(公告)日:2022-12-15

    申请号:US17344661

    申请日:2021-06-10

    Abstract: A memory device includes a first stack structure, a second stack structure, a channel pillar, a storage layer, and a conductive pillar. The first stack structure includes a first insulating layer and a first conductive layer located on the first insulating layer. The second stack structure is located on the first stack structure and includes a plurality of second conductive layers and a plurality of second insulating layers which alternate with each other. The channel pillar penetrates through the second stack structure and extends to the first stack structure. The storage layer is located between the channel pillar and the first stack structure and between the channel pillar and the second stack structure. The conductive pillar is located in the first conductive layer and electrically connected to the first conductive layer and the substrate.

    Memory device and manufacturing method thereof

    公开(公告)号:US12048154B2

    公开(公告)日:2024-07-23

    申请号:US17344661

    申请日:2021-06-10

    CPC classification number: H10B43/27 H10B41/10 H10B41/27 H10B43/10

    Abstract: A memory device includes a first stack structure, a second stack structure, a channel pillar, a storage layer, and a conductive pillar. The first stack structure includes a first insulating layer and a first conductive layer located on the first insulating layer. The second stack structure is located on the first stack structure and includes a plurality of second conductive layers and a plurality of second insulating layers which alternate with each other. The channel pillar penetrates through the second stack structure and extends to the first stack structure. The storage layer is located between the channel pillar and the first stack structure and between the channel pillar and the second stack structure. The conductive pillar is located in the first conductive layer and electrically connected to the first conductive layer and the substrate.

Patent Agency Ranking