公开(公告)号：US09773294B2

公开(公告)日：2017-09-26

申请号：US14680081

申请日：2015-04-07

Applicant: MEDIATEK INC.

Inventor： Chun-Shen Liu ,  Ming-Hao Liao ,  Hung-Wei Wu

IPC: G06T1/60 ,  G06T15/00 ,  G06T15/40

CPC classification number: G06T1/60 ,  G06T11/40 ,  G06T15/005 ,  G06T15/40

Abstract: A graphics processing system includes a decision logic and a varying buffer control circuit. The decision logic sets a control signal by checking at least one criterion, wherein the at least one criterion includes a first criterion, and a checking result of the first criterion depends on a size of a primitive. The varying buffer control circuit refers to the control signal to determine whether to store varying variables of the primitive into a varying buffer.

公开(公告)号：US09830731B2

公开(公告)日：2017-11-28

申请号：US15075041

申请日：2016-03-18

Applicant: MediaTek Inc.

Inventor： Pei-Kuei Tsung ,  Sung-Fang Tsai ,  Ming-Hao Liao ,  Yang-Yao Lin ,  Ken-Fu Liang ,  Chun-Shen Liu

IPC: G06T15/00 ,  G06T11/40 ,  G06F9/50

CPC classification number: G06T15/005 ,  G06F9/50 ,  G06T11/40

Abstract: A method of a graphics-processing unit (GPU) for tile-based rendering of a display area and a graphics-processing apparatus are provided. The method includes the steps of computing vertex positions of a plurality of vertexes, wherein the first vertex corresponds to a first thread and the second vertex corresponds to a second thread; determining whether a thread merge condition is satisfied; merging the first thread and the second thread to a thread group when determining that the thread merge condition is satisfied; computing vertex varyings of the plurality of vertexes, wherein when the first thread and the second thread are merged to the thread group, a varying of the first vertex and a varying of the second vertex are computed with respect to a program counter.

公开(公告)号：US20160005143A1

公开(公告)日：2016-01-07

申请号：US14680081

申请日：2015-04-07

Applicant: MEDIATEK INC.

Inventor： Chun-Shen Liu ,  Ming-Hao Liao ,  Hung-Wei Wu

IPC: G06T1/60 ,  G06T7/00 ,  G06K9/46 ,  G06T15/08

CPC classification number: G06T1/60 ,  G06T11/40 ,  G06T15/005 ,  G06T15/40

Abstract: A graphics processing system includes a decision logic and a varying buffer control circuit. The decision logic sets a control signal by checking at least one criterion, wherein the at least one criterion includes a first criterion, and a checking result of the first criterion depends on a size of a primitive. The varying buffer control circuit refers to the control signal to determine whether to store varying variables of the primitive into a varying buffer.

Abstract translation: 图形处理系统包括判定逻辑和变化的缓冲器控制电路。 所述决策逻辑通过检查至少一个标准来设置控制信号，其中所述至少一个标准包括第一准则，并且所述第一准则的检查结果取决于原语的大小。 变化的缓冲器控制电路是指控制信号，以确定是否将变化的原语变量存储到变化的缓冲器中。