公开(公告)号：US20160204768A1

公开(公告)日：2016-07-14

申请号：US14825149

申请日：2015-08-12

申请人： Mediatek Inc.

发明人： Yan-Bin Luo ,  Chien-Hua Wu ,  Chung-Shi Lin ,  Chih-Hsien Lin

IPC分类号： H03K3/012 ,  H04L25/03

CPC分类号： H03K3/012 ,  H03K19/017509 ,  H03K19/018528 ,  H03K19/018585 ,  H04L25/03076

摘要： A driver circuit for receiving input data and generating an output signal to a termination element is provided, wherein the input data has a first bit and second bit, and the driver circuit includes: a pair of differential output terminals for outputting the output signal, wherein the pair of differential output terminals has a first output terminal and a second output terminal; at least one current mode drive unit, coupled to the pair of differential output terminals, for outputting a current from one of the first output terminal and the second output terminal, and receiving the current from the other of the first output terminal and the second output terminal according to the first bit; and at least one voltage mode drive unit, coupled to the pair of differential output terminals, for providing voltages to the first output terminal and the second output terminal according to the second bit.

摘要翻译： 提供了一种用于接收输入数据并向终端元件产生输出信号的驱动电路，其中输入数据具有第一位和第二位，并且驱动电路包括：一对差分输出端，用于输出输出信号，其中 一对差分输出端子具有第一输出端子和第二输出端子; 耦合到所述一对差分输出端子的至少一个电流模式驱动单元，用于从所述第一输出端子和所述第二输出端子之一输出电流，以及从所述第一输出端子和所述第二输出端子中的另一个接收电流 终端根据第一位; 以及耦合到所述一对差分输出端子的至少一个电压模式驱动单元，用于根据所述第二位向所述第一输出端子和所述第二输出端子提供电压。

公开(公告)号：US09590610B2

公开(公告)日：2017-03-07

申请号：US14822913

申请日：2015-08-11

申请人： MEDIATEK INC.

发明人： Yan-Bin Luo ,  Chien-Hua Wu ,  Chung-Shi Lin ,  Chih-Hsien Lin

IPC分类号： H03K17/10 ,  H04L25/02 ,  H04L25/49

CPC分类号： H03K17/10 ,  H04L25/0272 ,  H04L25/0282 ,  H04L25/4906

摘要： A driver circuit for receiving input data and generating an output signal to a termination element is disclosed, wherein the input data has a first bit and second bit, and the driver circuit includes: a pair of differential output terminals, arranged for outputting the output signal, wherein the pair of differential output terminals has a first output terminal and a second output terminal; a current mode drive unit, coupled to the pair of differential output terminals, for outputting a current from one of the first output terminal and the second output terminal, and receiving the current from the other of the first output terminal and the second output terminal according to the first bit; and a voltage mode drive unit, coupled to the pair of differential output terminals, for providing voltages to the first output terminal and the second output terminal according to at least the second bit.

摘要翻译： 公开了一种用于接收输入数据并向终端元件产生输出信号的驱动电路，其中输入数据具有第一位和第二位，并且驱动电路包括：一对差分输出端，用于输出输出信号 ，其中所述一对差分输出端子具有第一输出端子和第二输出端子; 电流模式驱动单元，耦合到所述一对差分输出端子，用于从所述第一输出端子和所述第二输出端子之一输出电流，以及根据所述第一输出端子和所述第二输出端子中的另一个接收所述电流， 到第一位 以及耦合到所述一对差分输出端子的电压模式驱动单元，用于根据至少所述第二位向所述第一输出端子和所述第二输出端子提供电压。

公开(公告)号：US09590595B2

公开(公告)日：2017-03-07

申请号：US14825149

申请日：2015-08-12

申请人： MEDIATEK INC.

发明人： Yan-Bin Luo ,  Chien-Hua Wu ,  Chung-Shi Lin ,  Chih-Hsien Lin

IPC分类号： H03K17/10 ,  H03K3/012 ,  H03K19/0185 ,  H04L25/03 ,  H03K19/0175

CPC分类号： H03K3/012 ,  H03K19/017509 ,  H03K19/018528 ,  H03K19/018585 ,  H04L25/03076

摘要： A driver circuit for receiving input data and generating an output signal to a termination element is provided, wherein the input data has a first bit and second bit, and the driver circuit includes: a pair of differential output terminals for outputting the output signal, wherein the pair of differential output terminals has a first output terminal and a second output terminal; at least one current mode drive unit, coupled to the pair of differential output terminals, for outputting a current from one of the first output terminal and the second output terminal, and receiving the current from the other of the first output terminal and the second output terminal according to the first bit; and at least one voltage mode drive unit, coupled to the pair of differential output terminals, for providing voltages to the first output terminal and the second output terminal according to the second bit.

摘要翻译： 提供了一种用于接收输入数据并向终端元件产生输出信号的驱动电路，其中输入数据具有第一位和第二位，并且驱动电路包括：一对差分输出端，用于输出输出信号，其中 一对差分输出端子具有第一输出端子和第二输出端子; 耦合到所述一对差分输出端子的至少一个电流模式驱动单元，用于从所述第一输出端子和所述第二输出端子之一输出电流，以及从所述第一输出端子和所述第二输出端子中的另一个接收电流 终端根据第一位; 以及耦合到所述一对差分输出端子的至少一个电压模式驱动单元，用于根据所述第二位向所述第一输出端子和所述第二输出端子提供电压。

公开(公告)号：US20160191037A1

公开(公告)日：2016-06-30

申请号：US14822913

申请日：2015-08-11

申请人： MEDIATEK INC.

发明人： Yan-Bin Luo ,  Chien-Hua Wu ,  Chung-Shi Lin ,  Chih-Hsien Lin

IPC分类号： H03K17/10

CPC分类号： H03K17/10 ,  H04L25/0272 ,  H04L25/0282 ,  H04L25/4906

摘要： A driver circuit for receiving input data and generating an output signal to a termination element is disclosed, wherein the input data has a first bit and second bit, and the driver circuit includes: a pair of differential output terminals, arranged for outputting the output signal, wherein the pair of differential output terminals has a first output terminal and a second output terminal; a current mode drive unit, coupled to the pair of differential output terminals, for outputting a current from one of the first output terminal and the second output terminal, and receiving the current from the other of the first output terminal and the second output terminal according to the first bit; and a voltage mode drive unit, coupled to the pair of differential output terminals, for providing voltages to the first output terminal and the second output terminal according to at least the second bit.

摘要翻译： 公开了一种用于接收输入数据并向终端元件产生输出信号的驱动电路，其中输入数据具有第一位和第二位，并且驱动电路包括：一对差分输出端，用于输出输出信号 ，其中所述一对差分输出端子具有第一输出端子和第二输出端子; 电流模式驱动单元，耦合到所述一对差分输出端子，用于从所述第一输出端子和所述第二输出端子之一输出电流，以及根据所述第一输出端子和所述第二输出端子中的另一个接收所述电流， 到第一位 以及耦合到所述一对差分输出端子的电压模式驱动单元，用于根据至少所述第二位向所述第一输出端子和所述第二输出端子提供电压。

公开(公告)号：US20170148558A1

公开(公告)日：2017-05-25

申请号：US15135558

申请日：2016-04-22

申请人： MEDIATEK INC.

发明人： Huan-Sheng Chen ,  Yen-Ju Lu ,  Chung-Shi Lin ,  Chien-Hua Wu ,  Yan-Bin Luo

IPC分类号： H01F27/28 ,  H01F27/29

CPC分类号： H01F27/28 ,  H01F27/2804 ,  H01F27/29 ,  H01F38/14

摘要： An inductor module comprising: a first inductor, comprising a first inductor area; and a second inductor, comprising a second inductor area. A first overlapped area of the first inductor area and a second overlapped area of the second inductor area are overlapped. The second overlapped area comprises at least one first magnetic direction area and at least one second magnetic direction area. A ratio between a size of the first magnetic direction area and a size of the second magnetic direction area is a predetermined ratio such that a coupling effect between the first inductor and the second inductor is lower or equals to a predetermined value.