JITTER CONTROL CIRCUIT WITHIN CHIP AND ASSOCIATED JITTER CONTROL METHOD
    2.
    发明申请
    JITTER CONTROL CIRCUIT WITHIN CHIP AND ASSOCIATED JITTER CONTROL METHOD 有权
    芯片和相关抖动控制方法中的抖动控制电路

    公开(公告)号:US20160359488A1

    公开(公告)日:2016-12-08

    申请号:US15091588

    申请日:2016-04-06

    Applicant: MEDIATEK INC.

    CPC classification number: H03L1/00 G01R31/31709 H03L7/00 H04L7/0087 H04L7/065

    Abstract: A jitter control circuit within a chip comprises an adaptive PDN, a current generator and a jitter generator. The adaptive PDN is capable of being controlled/modulated to provide difference impedances. The current generator is coupled to the adaptive PDN, and is arranged for receiving a supply voltage provided by the adaptive PDN and generating currents with different patterns. The jitter generator is coupled to the adaptive PDN, and is arranged for generating a plurality of jitters corresponding to the currents with different patterns, respectively, according to the supply voltage provided by the adaptive PDN.

    Abstract translation: 芯片内的抖动控制电路包括自适应PDN,电流发生器和抖动发生器。 自适应PDN能够被控制/调制以提供差分阻抗。 电流发生器耦合到自适应PDN,并且被布置为用于接收由自适应PDN提供的电源电压并且生成具有不同模式的电流。 抖动发生器耦合到自适应PDN,并且被配置为根据由自适应PDN提供的电源电压分别产生对应于具有不同模式的电流的多个抖动。

    METHOD FOR PERFORMING IMPEDANCE PROFILE CONTROL OF A POWER DELIVERY NETWORK IN AN ELECTRONIC DEVICE, AND ASSOCIATED APPARATUS
    3.
    发明申请
    METHOD FOR PERFORMING IMPEDANCE PROFILE CONTROL OF A POWER DELIVERY NETWORK IN AN ELECTRONIC DEVICE, AND ASSOCIATED APPARATUS 审中-公开
    用于执行电子设备中的电力传送网络的阻抗配置文件控制的方法及相关设备

    公开(公告)号:US20160173082A1

    公开(公告)日:2016-06-16

    申请号:US14830738

    申请日:2015-08-20

    Applicant: MEDIATEK INC.

    CPC classification number: H03K17/56 G06F1/26

    Abstract: A method and apparatus for performing impedance profile control of a power delivery network (PDN) in an electronic device are provided. The method includes the steps of: utilizing a capacitive component and a resistive component that are coupled in series as an output stage of the PDN, wherein the capacitive component includes one terminal coupled to a first voltage level of the PDN and further includes another terminal, and the resistive component includes a first terminal coupled to the other terminal of the capacitive component and further includes a second terminal coupled to a second voltage level of the PDN; and inputting a control signal into a third terminal of the resistive component, to control an impedance profile of the output stage of the PDN, wherein in a predetermined state of the control signal, the control signal is a time variant signal. The control signal may be digital or analog.

    Abstract translation: 提供了一种用于在电子设备中执行电力输送网络(PDN)的阻抗曲线控制的方法和装置。 该方法包括以下步骤:利用串联耦合作为PDN的输出级的电容部件和电阻部件,其中电容部件包括耦合到PDN的第一电压电平的一个端子,并且还包括另一个端子, 并且所述电阻部件包括耦合到所述电容部件的另一端的第一端子,并且还包括耦合到所述PDN的第二电压电平的第二端子; 以及将控制信号输入到所述电阻部件的第三端子中,以控制所述PDN的输出级的阻抗曲线,其中在所述控制信号的预定状态下,所述控制信号是时变信号。 控制信号可以是数字或模拟的。

Patent Agency Ranking