公开(公告)号：US20240377876A1

公开(公告)日：2024-11-14

申请号：US18316344

申请日：2023-05-12

Applicant: MEDIATEK INC.

Inventor： Ching-Yao HUANG ,  Bo-Yun LIN ,  Tai-Ying JIANG ,  Hui-Hsuan WANG

IPC: G06F1/3234 ,  G06F1/3237 ,  G06F1/3287

Abstract: A method for saving power is provided. The method is used in a slave device. The method includes receiving a first system power management interface (SPMI) write command from an external device via a SPMI bus when the slave device is in sleep mode. The method includes turning on a system clock in response to the first SPMI write command indicating to turn on the system clock. The method includes allowing the external device to access the slave device.

公开(公告)号：US20240419235A1

公开(公告)日：2024-12-19

申请号：US18336268

申请日：2023-06-16

Applicant: MEDIATEK INC.

Inventor： Ching-Yao HUANG ,  Bo-Yun LIN ,  Tai-Ying JIANG ,  Hui-Hsuan WANG

IPC: G06F1/3237 ,  G06F1/3287

Abstract: A method for saving power is provided. The method is used in a slave device. The method includes receiving a first switch request indicating to switch a clock source from a first clock to a second clock when the slave device enters sleep mode. The method includes transmitting a first clock source signal indicating to switch the clock source from the first clock to the second clock to registers. The method includes switching the clock source from the first clock to the second clock to the registers according to the first clock source signal.

公开(公告)号：US20240319782A1

公开(公告)日：2024-09-26

申请号：US18605933

申请日：2024-03-15

Applicant: MEDIATEK Inc.

Inventor： Tse-Chung LI ,  Tai-Ying JIANG ,  Ching-Wen CHEN ,  Shang-Wei CHEN

IPC: G06F1/3296 ,  G06F1/3209

CPC classification number: G06F1/3296 ,  G06F1/3209

Abstract: The processor comprises multiple sub-systems. Each sub-system is configured to generate a voltage switching signal. The processor also comprises a packetizing module coupled to the sub-systems. The packetizing module packetizes multiple voltage switching signals generated by the sub-systems to a packet. The processor also comprises a PMIF (power management interface) configured to receive the packet and output the packet.