公开(公告)号：US09867135B1

公开(公告)日：2018-01-09

申请号：US15425183

申请日：2017-02-06

Applicant: MEDIATEK INC.

Inventor： Shao-Wei Feng ,  Shih-Chi Shen ,  Tso-Mo Chen ,  Chun-Ming Kuo

IPC: H03L7/26 ,  H04W52/02 ,  H03L7/16 ,  H03B5/32

CPC classification number: H04W52/029 ,  G06F7/68 ,  H03K5/00006 ,  H03L7/16 ,  H04W52/0287 ,  Y02D70/00

Abstract: A frequency-generating circuit includes a frequency synthesizer circuit and a reference clock signal processor. The frequency synthesizer circuit receives a processed reference clock signal and generates a radio-frequency clock signal according to the processed reference clock signal. The reference clock signal processor receives an original reference clock signal from an oscillator and processes the original reference clock signal according to an indication signal to generate the processed reference clock signal. The indication signal is generated according to a required reference clock frequency of a communications apparatus. When the required reference clock frequency is high, a frequency of the processed reference clock signal is a multiple of a frequency of the original reference clock signal, and when the required reference clock frequency is low, the frequency of the original reference clock signal is a multiple of the frequency of the processed reference clock signal.