公开(公告)号：US20180027240A1

公开(公告)日：2018-01-25

申请号：US15653550

申请日：2017-07-19

Applicant: MEDIATEK INC.

Inventor： Yen-Chao Huang ,  Li-Heng Chen ,  Tung-Hsing Wu ,  Chung-Hua Tsai ,  Lien-Fei Chen ,  Han-Liang Chou

IPC: H04N19/159 ,  H04N19/50 ,  H04N19/176 ,  H04N19/61

CPC classification number: H04N19/159 ,  H04N19/174 ,  H04N19/176 ,  H04N19/436 ,  H04N19/50 ,  H04N19/61 ,  H04N19/91

Abstract: A video encoding apparatus has a bitstream buffer and a first video encoder. The first video encoder sequentially encodes coding blocks of a first video frame segment in a first encoding order, and outputs encoded data of the coding blocks of the first video frame segment to the bitstream buffer. The first video frame segment is partitioned into a plurality of column tiles, each having at least one tile. The first encoding order is identical to an encoding order of encoding a video frame segment with only a single column tile.