公开(公告)号：US20190052799A1

公开(公告)日：2019-02-14

申请号：US16057830

申请日：2018-08-08

Applicant: MEDIATEK INC.

Inventor： Tsu-Ming Liu ,  Chang-Hung Tsai ,  Tung-Hsing Wu ,  Jia-Ying Lin ,  Li-Heng Chen ,  Han-Liang Chou ,  Chi-Cheng Ju

IPC: H04N5/232 ,  G06K9/62 ,  H04N5/235 ,  H04N19/172 ,  H04N19/124 ,  H04N19/176 ,  G06N99/00

Abstract: A perception-based image processing apparatus includes an image analyzing circuit and an application circuit. The image analyzing circuit obtains training data, sets a perception model according to the training data, performs an object detection of at least one frame, and generates an object detection information signal based at least partly on a result of the object detection of said at least one frame. The application circuit operates in response to the object detection information signal.

公开(公告)号：US20180020221A1

公开(公告)日：2018-01-18

申请号：US15641224

申请日：2017-07-04

Applicant: MEDIATEK INC.

Inventor： Ming-Long Wu ,  Tung-Hsing Wu ,  Li-Heng Chen ,  Ting-An Lin ,  Yi-Hsin Huang ,  Chung-Hua Tsai ,  Chia-Yun Cheng ,  Han-Liang Chou ,  Yung-Chang Chang

IPC: H04N19/13 ,  H04N21/2665 ,  H04N21/2365 ,  H04N21/2343 ,  H04N19/70 ,  H04N19/44 ,  H04N19/172 ,  H04N21/845 ,  H04N19/124

CPC classification number: H04N19/13 ,  H04N19/124 ,  H04N19/172 ,  H04N19/174 ,  H04N19/18 ,  H04N19/44 ,  H04N19/70 ,  H04N21/234363 ,  H04N21/2365 ,  H04N21/2665 ,  H04N21/8456

Abstract: A video encoder has a processing circuit and a universal binary entropy (UBE) syntax encoder. The processing circuit processes pixel data of a video frame to generate encoding-related data, wherein the encoding-related data comprise at least quantized transform coefficients. The UBE syntax encoder processes a plurality of syntax elements to generate UBE syntax data. The encoding-related data are represented by the syntax elements. The processing circuit operates according to a video coding standard. The video coding standard supports arithmetic encoding. The UBE syntax data contain no arithmetic-encoded syntax data.

公开(公告)号：US20170310969A1

公开(公告)日：2017-10-26

申请号：US15480394

申请日：2017-04-06

Applicant: MEDIATEK INC.

Inventor： Li-Heng Chen ,  Tung-Hsing Wu ,  Han-Liang Chou

IPC: H04N19/136 ,  H04N19/186 ,  H04N19/12 ,  H04N19/182 ,  H04N19/70 ,  H04N19/61

CPC classification number: H04N19/136 ,  H04N19/12 ,  H04N19/61

Abstract: An image encoding method for encoding an image includes following steps: determining a coding mode selected from a plurality of candidate coding modes for a current coding block, wherein the current coding block included in the image comprises a plurality of pixels; and encoding the current coding block into a part of a bitstream according to at least the determined coding mode. The step of encoding the current coding includes: determining a first predictor presented in a first color space according to a plurality of reconstructed pixels presented in the first color space; transforming the first predictor presented in the first color space to a second predictor presented in a second color space different from the first color space; and encoding the current coding block under the second color space according to at least the second predictor.

公开(公告)号：US10904577B2

公开(公告)日：2021-01-26

申请号：US16194396

申请日：2018-11-19

Applicant: MEDIATEK INC.

Inventor： Li-Heng Chen ,  Chung-Hua Tsai ,  Tung-Hsing Wu ,  Lien-Fei Chen ,  Yu-Kun Lin ,  Yi-Hsin Huang ,  Han-Liang Chou

IPC: H04N19/184 ,  H04N19/85 ,  H04N19/70

Abstract: A video compression system includes a video encoder and a bitstream processing circuit. The video encoder is hardware that performs hardware video encoding upon frames to generate a first bitstream. The first bitstream is output from an entropy encoding circuit of the video encoder. The bitstream processing circuit performs a bitstream post-processing operation upon the first bitstream to produce a second bitstream that is different from the first bitstream, and outputs the second bitstream as a compression output of the frames.

公开(公告)号：US10805519B2

公开(公告)日：2020-10-13

申请号：US16057830

申请日：2018-08-08

Applicant: MEDIATEK INC.

Inventor： Tsu-Ming Liu ,  Chang-Hung Tsai ,  Tung-Hsing Wu ,  Jia-Ying Lin ,  Li-Heng Chen ,  Han-Liang Chou ,  Chi-Cheng Ju

IPC: H04N5/228 ,  H04N5/232 ,  G06K9/62 ,  H04N19/172 ,  H04N19/124 ,  H04N19/176 ,  H04N5/235 ,  G06N20/00 ,  H04N19/162 ,  H04N19/174 ,  G06N3/04 ,  G06N3/08

Abstract: A perception-based image processing apparatus includes an image analyzing circuit and an application circuit. The image analyzing circuit obtains training data, sets a perception model according to the training data, performs an object detection of at least one frame, and generates an object detection information signal based at least partly on a result of the object detection of said at least one frame. The application circuit operates in response to the object detection information signal.

公开(公告)号：US10225561B2

公开(公告)日：2019-03-05

申请号：US15210903

申请日：2016-07-15

Applicant: MEDIATEK INC.

Inventor： Li-Heng Chen ,  Tung-Hsing Wu ,  Han-Liang Chou

IPC: H04N19/136 ,  H04N19/176 ,  H04N19/103

Abstract: A method and apparatus of coding using multiple coding modes with multiple color spaces are provided. For the encoder side, a coding mode is selected from a coding mode group. A corresponding color domain is associated with the coding mode and the corresponding color domain is selected from a color-domain group including at least two different color domains. The current coding unit is then encoded in the corresponding color domain using the coding mode. Furthermore, the syntax of the corresponding color domain is signaled in current coding unit syntaxes. The different color domains may include RGB color domain and YCoCg color domain. According to another method, if the midpoint prediction (MPP) mode is selected, a current block is color transformed into another color domain and the MPP coding process is performed in said another color domain.

公开(公告)号：US20180027240A1

公开(公告)日：2018-01-25

申请号：US15653550

申请日：2017-07-19

Applicant: MEDIATEK INC.

Inventor： Yen-Chao Huang ,  Li-Heng Chen ,  Tung-Hsing Wu ,  Chung-Hua Tsai ,  Lien-Fei Chen ,  Han-Liang Chou

IPC: H04N19/159 ,  H04N19/50 ,  H04N19/176 ,  H04N19/61

CPC classification number: H04N19/159 ,  H04N19/174 ,  H04N19/176 ,  H04N19/436 ,  H04N19/50 ,  H04N19/61 ,  H04N19/91

Abstract: A video encoding apparatus has a bitstream buffer and a first video encoder. The first video encoder sequentially encodes coding blocks of a first video frame segment in a first encoding order, and outputs encoded data of the coding blocks of the first video frame segment to the bitstream buffer. The first video frame segment is partitioned into a plurality of column tiles, each having at least one tile. The first encoding order is identical to an encoding order of encoding a video frame segment with only a single column tile.

公开(公告)号：US20170230691A1

公开(公告)日：2017-08-10

申请号：US15422484

申请日：2017-02-02

Applicant: MEDIATEK INC.

Inventor： Tung-Hsing Wu ,  Li-Heng Chen ,  Han-Liang Chou

IPC: H04N19/91 ,  H04N19/182 ,  H04N19/50

CPC classification number: H04N19/91

Abstract: An entropy encoder includes an entropy encoding circuit and a size determining circuit. The entropy encoding circuit receives symbols of a pixel group, and entropy encodes data derived from the symbols of the pixel group to generate a bitstream segment which is composed of a first bitstream portion and a second bitstream portion. The first bitstream portion contains encoded magnitude data of the symbols of the pixel group, and the second bitstream portion contains encoded sign data of at least a portion of the symbols of the pixel group. The size determining circuit determines a size of a bitstream portion, wherein the bitstream portion comprises at least one of the first bitstream portion and the second bitstream portion.

公开(公告)号：US20210195207A1

公开(公告)日：2021-06-24

申请号：US17190409

申请日：2021-03-03

Applicant: MEDIATEK INC.

Inventor： Li-Heng Chen ,  Tung-Hsing Wu ,  Yi-Hsin Huang ,  Lien-Fei Chen ,  Ting-An Lin ,  Han-Liang Chou

IPC: H04N19/15 ,  H04N19/105 ,  H04N19/172 ,  H04N19/159 ,  H04N19/184 ,  H04N19/463

Abstract: A video encoding apparatus includes a data buffer and a video encoding circuit. Encoding of a first frame includes: deriving reference pixels of a reference frame from reconstructed pixels of the first frame, respectively, and storing reference pixel data into the data buffer for inter prediction, wherein the reference pixel data include information of pixel values of the reference pixels. Encoding of a second frame includes performing prediction upon a coding unit in the second frame to determine a target predictor for the coding unit. The prediction performed upon the coding unit includes: determining the target predictor for the coding unit according to whether a search range on the reference frame for finding a predictor of the coding unit under an inter prediction mode includes at least one reference pixel of the reference frame that is not accessible to the video encoding circuit.

公开(公告)号：US10602192B2

公开(公告)日：2020-03-24

申请号：US15422484

申请日：2017-02-02

Applicant: MEDIATEK INC.

Inventor： Tung-Hsing Wu ,  Li-Heng Chen ,  Han-Liang Chou

IPC: H04N7/12 ,  H04N19/91

Abstract: An entropy encoder includes an entropy encoding circuit and a size determining circuit. The entropy encoding circuit receives symbols of a pixel group, and entropy encodes data derived from the symbols of the pixel group to generate a bitstream segment which is composed of a first bitstream portion and a second bitstream portion. The first bitstream portion contains encoded magnitude data of the symbols of the pixel group, and the second bitstream portion contains encoded sign data of at least a portion of the symbols of the pixel group. The size determining circuit determines a size of a bitstream portion, wherein the bitstream portion comprises at least one of the first bitstream portion and the second bitstream portion.