公开(公告)号：US20210359667A1

公开(公告)日：2021-11-18

申请号：US17225101

申请日：2021-04-07

Applicant: MEDIATEK INC.

Inventor： Kin-Hooi Dia ,  Yi-Horng Chiou

IPC: H03K3/012 ,  H03K3/037 ,  G01R31/3177 ,  G01R31/317

Abstract: A multi-bit flip-flop (MBFF) has flip-flops connected to form an internal scan chain. One of the flip-flops outputs a first data-out signal at a first data output terminal of the MBFF, and includes a selection circuit, a latch-based circuit, and a data-out stage circuit. The selection circuit transmits a data signal or a test signal to an output node of the selection circuit to serve as an input signal. The latch-based circuit generates a first signal according to the input signal. The data-out stage circuit receives the first signal, and generates the data-out signal according to the first signal. When the MBFF operates in a test mode, the selection circuit transmits the test signal to serve as the input signal, and the data-out stage circuit keeps the data-out signal at a fixed voltage level regardless of a voltage level of the test signal.

公开(公告)号：US11714125B2

公开(公告)日：2023-08-01

申请号：US17225101

申请日：2021-04-07

Applicant: MEDIATEK INC.

Inventor： Kin-Hooi Dia ,  Yi-Horng Chiou

IPC: G01R31/317 ,  G01R31/3177 ,  G01R31/3185 ,  H03K3/012 ,  H03K3/037

CPC classification number: G01R31/31721 ,  G01R31/3177 ,  G01R31/318541 ,  H03K3/012 ,  H03K3/037

Abstract: A multi-bit flip-flop (MBFF) has flip-flops connected to form an internal scan chain. One of the flip-flops outputs a first data-out signal at a first data output terminal of the MBFF, and includes a selection circuit, a latch-based circuit, and a data-out stage circuit. The selection circuit transmits a data signal or a test signal to an output node of the selection circuit to serve as an input signal. The latch-based circuit generates a first signal according to the input signal. The data-out stage circuit receives the first signal, and generates the data-out signal according to the first signal. When the MBFF operates in a test mode, the selection circuit transmits the test signal to serve as the input signal, and the data-out stage circuit keeps the data-out signal at a fixed voltage level regardless of a voltage level of the test signal.

公开(公告)号：US20230179187A1

公开(公告)日：2023-06-08

申请号：US17989654

申请日：2022-11-17

Applicant: MEDIATEK INC.

Inventor： Yi-Horng Chiou ,  Kin-Hooi Dia

IPC: H03K3/037

CPC classification number: H03K3/0372

Abstract: A semiconductor device includes a plurality of cell rows, a first functional block and a second functional block. The plurality of cell rows at least includes a first cell row and a second cell row. The first functional block is formed in the first cell row and configured to provide a first predetermined function. The second functional block is formed in the second cell row and configured to provide a second predetermined function which is the same as the first predetermined function. The first cell row and the second cell row have at least one different physical property.