公开(公告)号：US20240230755A9

公开(公告)日：2024-07-11

申请号：US18376447

申请日：2023-10-04

Applicant: MEDIATEK INC.

Inventor： Yu-Lin Yang ,  Chin-Wei Lin ,  Po-Chao Tsao ,  Tung-Hsing Lee ,  Chia-Jung Ni ,  Chi-Ming Lee ,  Yi-Ju Ting

IPC: G01R31/28 ,  G06N20/00

CPC classification number: G01R31/2894 ,  G06N20/00

Abstract: An outlier IC detection method includes acquiring first measured data of a first IC set, training the first measured data for establishing a training model, acquiring second measured data of a second IC set, generating predicted data of the second IC set by using the training model according to the second measured data, generating a bivariate dataset distribution of the second IC set according to the predicted data and the second measured data, acquiring a predetermined Mahalanobis distance on the bivariate dataset distribution of the second IC set, and identifying at least one outlier IC from the second IC set when at least one position of the at least one outlier IC on the bivariate dataset distribution is outside a range of the predetermined Mahalanobis distance.

公开(公告)号：US20240019491A1

公开(公告)日：2024-01-18

申请号：US18207122

申请日：2023-06-07

Applicant: MEDIATEK INC.

Inventor： Jia-Horng Shieh ,  Po-Chao Tsao ,  Ming-Cheng Lee ,  Tung-Hsing Lee ,  Chi-Ming Lee ,  Yi-Ju Ting

IPC: G01R31/3185

CPC classification number: G01R31/318511

Abstract: A die-level electrical parameter extraction method includes: obtaining electrical parameters of a plurality of transistor types; obtaining measurement results of a plurality of logic blocks; estimating a mapping relationship between the electrical parameters of the plurality of transistor types and the measurement results of the plurality of logic blocks; and regarding a specific die of a wafer, obtaining die-level measurement of the plurality of logic blocks, and generating die-level electrical parameters of the plurality of transistor types according to the mapping relationship and the die-level measurement results.

公开(公告)号：US20250054130A1

公开(公告)日：2025-02-13

申请号：US18798858

申请日：2024-08-09

Applicant: MEDIATEK INC.

Inventor： En Jen ,  Shao-Yun Liu ,  Yi-Ju Ting ,  Chin-Tang Lai ,  Chia-Shun Yeh ,  Ching-Yu Lin ,  Ching-Han Jan ,  Po-Hsuan Huang

IPC: G06T7/00 ,  G06V10/762

Abstract: A wafer map recognition method using artificial intelligence includes obtaining wafer maps of a plurality of wafers; performing an unsupervised algorithm on the wafer map of each wafer in the plurality of wafers to generate a feature data set for the corresponding wafer map; and performing a clustering algorithm according to a plurality of feature data sets for the plurality of wafer maps to find a wafer map with a potential defect.

公开(公告)号：US20240133949A1

公开(公告)日：2024-04-25

申请号：US18376447

申请日：2023-10-03

Applicant: MEDIATEK INC.

Inventor： Yu-Lin Yang ,  Chin-Wei Lin ,  Po-Chao Tsao ,  Tung-Hsing Lee ,  Chia-Jung Ni ,  Chi-Ming Lee ,  Yi-Ju Ting

IPC: G01R31/28 ,  G06N20/00

CPC classification number: G01R31/2894 ,  G06N20/00

Abstract: An outlier IC detection method includes acquiring first measured data of a first IC set, training the first measured data for establishing a training model, acquiring second measured data of a second IC set, generating predicted data of the second IC set by using the training model according to the second measured data, generating a bivariate dataset distribution of the second IC set according to the predicted data and the second measured data, acquiring a predetermined Mahalanobis distance on the bivariate dataset distribution of the second IC set, and identifying at least one outlier IC from the second IC set when at least one position of the at least one outlier IC on the bivariate dataset distribution is outside a range of the predetermined Mahalanobis distance.