公开(公告)号：US20190207832A1

公开(公告)日：2019-07-04

申请号：US15861699

申请日：2018-01-04

Applicant: Mellanox Technologies TLV Ltd.

Inventor： Shachar Dor

IPC: H04L12/26 ,  H04L12/24

Abstract: Communication apparatus includes a plurality of ports, including at least a first port configured to transmit and receive first data packets over a network in accordance with a network-layer protocol to and from a network management station, and a second port configured to be connected to a neighboring unmanaged device so as to transmit and receive second data packets to and from the unmanaged device in accordance with a link-layer protocol. A processor is configured to receive telemetry data from the unmanaged device via the second port in accordance with the link-layer protocol, to aggregate the received telemetry data in a memory, and to report the aggregated telemetry data to the network management station via the first port in accordance with the network-layer protocol.

公开(公告)号：US10530673B2

公开(公告)日：2020-01-07

申请号：US15861699

申请日：2018-01-04

Applicant: Mellanox Technologies TLV Ltd.

Inventor： Shachar Dor

IPC: G06F15/173 ,  H04L12/26 ,  H04L12/24 ,  H04B3/46

Abstract: Communication apparatus includes a plurality of ports, including at least a first port configured to transmit and receive first data packets over a network in accordance with a network-layer protocol to and from a network management station, and a second port configured to be connected to a neighboring unmanaged device so as to transmit and receive second data packets to and from the unmanaged device in accordance with a link-layer protocol. A processor is configured to receive telemetry data from the unmanaged device via the second port in accordance with the link-layer protocol, to aggregate the received telemetry data in a memory, and to report the aggregated telemetry data to the network management station via the first port in accordance with the network-layer protocol.

公开(公告)号：US11934568B2

公开(公告)日：2024-03-19

申请号：US17115832

申请日：2020-12-09

Applicant: MELLANOX TECHNOLOGIES TLV LTD.

Inventor： Zachy Haramaty ,  Zvika Eyal ,  Shachar Dor ,  Liron Mula ,  Barry Spinney

IPC: G06F21/85 ,  G06F13/40 ,  G06F21/73 ,  G06F21/86

CPC classification number: G06F21/85 ,  G06F13/4068 ,  G06F21/73 ,  G06F21/86 ,  G06F2221/2103

Abstract: A device including a cable transceiver including cable electrical connections including data electrical connections and control electrical connections, and a hardware memory device, the hardware memory device storing a string identifying a cable and being electrically accessible from externally to the cable transceiver via the control electrical connections. The cable, in electrical connection with the cable electrical connections, may be included in the device. A device for verifying cable authenticity is also described, the device including interface hardware for interfacing a plurality of cables with the device, and verifier circuitry configured to verify that each of the plurality of cables is genuine based on a string stored in a hardware memory device included in each of the plurality of cables. Related apparatus and methods are also described.

公开(公告)号：US20210182441A1

公开(公告)日：2021-06-17

申请号：US17115832

申请日：2020-12-09

Applicant: MELLANOX TECHNOLOGIES TLV LTD.

Inventor： Zachy Haramaty ,  Zvika Eyal ,  Shachar Dor ,  Liron Mula ,  Barry Spinney

IPC: G06F21/85 ,  G06F21/86 ,  G06F21/73 ,  G06F13/40

Abstract: A device including a cable transceiver including cable electrical connections including data electrical connections and control electrical connections, and a hardware memory device, the hardware memory device storing a string identifying a cable and being electrically accessible from externally to the cable transceiver via the control electrical connections. The cable, in electrical connection with the cable electrical connections, may be included in the device. A device for verifying cable authenticity is also described, the device including interface hardware for interfacing a plurality of cables with the device, and verifier circuitry configured to verify that each of the plurality of cables is genuine based on a string stored in a hardware memory device included in each of the plurality of cables. Related apparatus and methods are also described.