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公开(公告)号:US20190221272A1
公开(公告)日:2019-07-18
申请号:US16366201
申请日:2019-03-27
Applicant: MICRON TECHNOLOGY, INC.
Inventor: TORU TANZAWA , AARON YIP
CPC classification number: G11C16/28 , G11C7/02 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/24 , G11C16/3427
Abstract: Apparatuses and methods for reducing capacitive loading are described. One apparatus includes a first memory string including first and second dummy memory cells, a second memory string including third and fourth dummy memory cells, and a control unit configured to provide first and second control signals to activate the first and second dummy memory cells of the first memory string and to further deactivate at least one of the third and fourth dummy memory cell of the second memory string.