公开(公告)号：US20230096256A1

公开(公告)日：2023-03-30

申请号：US17486611

申请日：2021-09-27

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Takashi Sasaki ,  Junya Suzuki

IPC: H01L27/108

Abstract: An apparatus includes a substrate, a memory cell region provided over the substrate, a peripheral region provided over the substrate and adjacent to the memory cell region, and first, second, third, fourth and fifth word-lines each extending in parallel across the memory cell region and the peripheral region in numerical order. An offcut of the second word-line is interposed between edge portions of the first and third word-lines, and no offcut of the fourth word-line is interposed between edge portions of the third and fifth word-lines.

公开(公告)号：US20240244836A1

公开(公告)日：2024-07-18

申请号：US18622235

申请日：2024-03-29

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Hidenori Yamaguchi ,  Katsumi Koge ,  Junya Suzuki ,  Hiroshi Ichikawa

IPC: H10B12/00

CPC classification number: H10B12/50 ,  H10B12/0335 ,  H10B12/053 ,  H10B12/09 ,  H10B12/315 ,  H10B12/34

Abstract: A semiconductor device includes: a substrate; a memory cell region over the substrate; a peripheral region over the substrate, the peripheral region being adjacent to the memory cell region; and a plurality of first and second word-lines extending across the memory cell region and the peripheral region; wherein the plurality of first word-lines and the plurality of second word-lines are arranged alternately with each other; and wherein the length of the first word-line in the peripheral region is longer than the length of the second word-line in the peripheral region.

公开(公告)号：US20220406792A1

公开(公告)日：2022-12-22

申请号：US17355006

申请日：2021-06-22

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Hidenori Yamaguchi ,  Katsumi Koge ,  Junya Suzuki ,  Hiroshi Ichikawa

IPC: H01L27/108

Abstract: A semiconductor device includes: a substrate; a memory cell region over the substrate; a peripheral region over the substrate, the peripheral region being adjacent to the memory cell region; and a plurality of first and second word-lines extending across the memory cell region and the peripheral region; wherein the plurality of first word-lines and the plurality of second word-lines are arranged alternately with each other; and wherein the length of the first word-line in the peripheral region is longer than the length of the second word-line in the peripheral region.