公开(公告)号：US11694738B2

公开(公告)日：2023-07-04

申请号：US17443056

申请日：2021-07-20

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Masaru Morohashi ,  Ryo Nagoshi ,  Yuan He ,  Yutaka Ito

IPC: G11C7/00 ,  G11C11/406

CPC classification number: G11C11/40615 ,  G11C11/40611

Abstract: Apparatuses and methods for generating multiple row hammer address refresh sequences. An example apparatus may include an address scrambler and a refresh control circuit. The address scrambler may receive a first address, output a second address in response to a first control signal, and output a third address in response to a second control signal. The second address may physically adjacent to the first address and the third address may physically adjacent to the second address. The refresh control circuit may perform a refresh operation on the second address when the first control signal is active and perform the refresh operation on the third address when the second control signal is active.

公开(公告)号：US20190385667A1

公开(公告)日：2019-12-19

申请号：US16012679

申请日：2018-06-19

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Masaru Morohashi ,  Ryo Nagoshi ,  Yuan He ,  Yutaka Ito

IPC: G11C11/406

Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for generating multiple row hammer address refresh sequences. An example apparatus may include an address scrambler and a refresh control circuit. The address scrambler may receive a first address, output a second address in response to a first control signal, and output a third address in response to a second control signal. The second address may physically adjacent to the first address and the third address may physically adjacent to the second address. The refresh control circuit may perform a refresh operation on the second address when the first control signal is active and perform the refresh operation on the third address when the second control signal is active.

公开(公告)号：US20210350844A1

公开(公告)日：2021-11-11

申请号：US17443056

申请日：2021-07-20

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Masaru Morohashi ,  Ryo Nagoshi ,  Yuan He ,  Yutaka Ito

IPC: G11C11/406

Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for generating multiple row hammer address refresh sequences. An example apparatus may include an address scrambler and a refresh control circuit. The address scrambler may receive a first address, output a second address in response to a first control signal, and output a third address in response to a second control signal. The second address may physically adjacent to the first address and the third address may physically adjacent to the second address. The refresh control circuit may perform a refresh operation on the second address when the first control signal is active and perform the refresh operation on the third address when the second control signal is active.

公开(公告)号：US11152050B2

公开(公告)日：2021-10-19

申请号：US16012679

申请日：2018-06-19

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Masaru Morohashi ,  Ryo Nagoshi ,  Yuan He ,  Yutaka Ito

IPC: G11C7/00 ,  G11C11/406

Abstract: Apparatuses and methods for generating multiple row hammer address refresh sequences. An example apparatus may include an address scrambler and a refresh control circuit. The address scrambler may receive a first address, output a second address in response to a first control signal, and output a third address in response to a second control signal. The second address may physically adjacent to the first address and the third address may physically adjacent to the second address. The refresh control circuit may perform a refresh operation on the second address when the first control signal is active and perform the refresh operation on the third address when the second control signal is active.