公开(公告)号：US20130286745A1

公开(公告)日：2013-10-31

申请号：US13929319

申请日：2013-06-27

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Frankie Roohparvar ,  Vishal Sarin ,  William Radke

IPC: G11C29/04

CPC classification number: H03M13/23 ,  G06F11/1068 ,  G11C16/26 ,  G11C29/04

Abstract: Methods and apparatus are disclosed, such as those involving a flash memory device that includes an array of memory cells. One such method includes detecting values of charges stored in selected memory cells in the memory cell array. The method also includes processing the detected values in accordance with a Viterbi algorithm so as to determine data stored in the selected memory cells. In one embodiment, the flash memory cell array includes word lines and bit lines. Detecting the values of charges includes detecting values of charges stored in a selected row of memory cells by selecting one of the word lines. The Viterbi algorithm provides correct data where inter-signal interference between the cells affects the accuracy of read data. For example, the Viterbi algorithm can be used to supplement error correction codes (ECC).

Abstract translation: 公开了诸如涉及包括存储器单元阵列的闪速存储器件的方法和装置。 一种这样的方法包括检测存储在存储单元阵列中的选定存储单元中的电荷的值。 该方法还包括根据维特比算法处理检测到的值，以便确定存储在所选存储单元中的数据。 在一个实施例中，闪存单元阵列包括字线和位线。 检测费用的值包括通过选择一个字线来检测存储在所选行的存储器单元中的电荷的值。 维特比算法提供正确的数据，其中单元之间的信号间干扰影响读取数据的准确性。 例如，维特比算法可用于补充纠错码（ECC）。

公开(公告)号：US09197251B2

公开(公告)日：2015-11-24

申请号：US14245662

申请日：2014-04-04

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Frankie Roohparvar ,  Vishal Sarin ,  William Radke

IPC: H03M13/03 ,  G11C29/00 ,  H03M13/23 ,  G06F11/10 ,  G11C16/26 ,  G11C29/04

CPC classification number: H03M13/23 ,  G06F11/1068 ,  G11C16/26 ,  G11C29/04

Abstract: Methods and apparatus are disclosed related to a memory device, such as a flash memory device that includes an array of memory cells. One such method includes detecting values of charges stored in selected memory cells in the memory cell array. The method also includes processing the detected values in accordance with a Viterbi algorithm so as to determine data stored in the selected memory cells. In one embodiment, the flash memory cell array includes word lines and bit lines. Detecting the values of charges includes detecting values of charges stored in a selected row of memory cells by selecting one of the word lines. The Viterbi algorithm provides correct data where inter-signal interference between the cells affects the accuracy of read data.

Abstract translation: 公开了与诸如包括存储器单元阵列的闪存器件的存储器件有关的方法和装置。 一种这样的方法包括检测存储在存储单元阵列中的选定存储单元中的电荷的值。 该方法还包括根据维特比算法处理检测到的值，以便确定存储在所选存储单元中的数据。 在一个实施例中，闪存单元阵列包括字线和位线。 检测费用的值包括通过选择一个字线来检测存储在所选行的存储器单元中的电荷的值。 维特比算法提供正确的数据，其中单元之间的信号间干扰影响读取数据的准确性。

公开(公告)号：US20140237326A1

公开(公告)日：2014-08-21

申请号：US14245662

申请日：2014-04-04

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Frankie Roohparvar ,  Vishal Sarin ,  William Radke

IPC: G06F11/10 ,  H03M13/23 ,  G11C16/26

CPC classification number: H03M13/23 ,  G06F11/1068 ,  G11C16/26 ,  G11C29/04

Abstract: Methods and apparatus are disclosed, such as those involving a flash memory device that includes an array of memory cells. One such method includes detecting values of charges stored in selected memory cells in the memory cell array. The method also includes processing the detected values in accordance with a Viterbi algorithm so as to determine data stored in the selected memory cells. In one embodiment, the flash memory cell array includes word lines and bit lines. Detecting the values of charges includes detecting values of charges stored in a selected row of memory cells by selecting one of the word lines. The Viterbi algorithm provides correct data where inter-signal interference between the cells affects the accuracy of read data. For example, the Viterbi algorithm can be used to supplement error correction codes (ECC).

Abstract translation: 公开了诸如涉及包括存储器单元阵列的闪速存储器件的方法和装置。 一种这样的方法包括检测存储在存储单元阵列中的选定存储单元中的电荷的值。 该方法还包括根据维特比算法处理检测到的值，以便确定存储在所选存储单元中的数据。 在一个实施例中，闪存单元阵列包括字线和位线。 检测费用的值包括通过选择一个字线来检测存储在所选行的存储器单元中的电荷的值。 维特比算法提供正确的数据，其中单元之间的信号间干扰影响读取数据的准确性。 例如，维特比算法可用于补充纠错码（ECC）。

公开(公告)号：US08719680B2

公开(公告)日：2014-05-06

申请号：US13929319

申请日：2013-06-27

Applicant: Micron Technology, Inc.

Inventor： Frankie Roohparvar ,  Vishal Sarin ,  William Radke

IPC: H03M13/00 ,  G11C29/00

CPC classification number: H03M13/23 ,  G06F11/1068 ,  G11C16/26 ,  G11C29/04

Abstract: Methods and apparatus are disclosed related to a memory device, such as a flash memory device that includes an array of memory cells. One such method includes detecting values of charges stored in selected memory cells in the memory cell array. The method also includes processing the detected values in accordance with a Viterbi algorithm so as to determine data stored in the selected memory cells. In one embodiment, the flash memory cell array includes word lines and bit lines. Detecting the values of charges includes detecting values of charges stored in a selected row of memory cells by selecting one of the word lines. The Viterbi algorithm provides correct data where inter-signal interference between the cells affects the accuracy of read data.

Abstract translation: 公开了与诸如包括存储器单元阵列的闪存器件的存储器件有关的方法和装置。 一种这样的方法包括检测存储在存储单元阵列中的选定存储单元中的电荷的值。 该方法还包括根据维特比算法处理检测到的值，以便确定存储在所选存储单元中的数据。 在一个实施例中，闪存单元阵列包括字线和位线。 检测费用的值包括通过选择一个字线来检测存储在所选行的存储器单元中的电荷的值。 维特比算法提供正确的数据，其中单元之间的信号间干扰影响读取数据的准确性。