Device for testing printed circuit boards
    1.
    发明授权
    Device for testing printed circuit boards 失效
    印刷电路板测试装置

    公开(公告)号:US07081768B2

    公开(公告)日:2006-07-25

    申请号:US10513256

    申请日:2003-05-02

    IPC分类号: G01R31/02

    摘要: A device for testing printed circuit boards (1) that have contact points (3) arranged in a pattern. The device includes a needle plate (4) that is parallel to the printed circuit board (1) and can be displaced towards the printed circuit board. The plate is equipped with fixed needles (6), whose points are arranged in the pattern of the contact points (3). The needles (6) and their points are arranged so that they can be repositioned in the (x,y) direction of the plane of the needle plate (4).

    摘要翻译: 一种用于测试具有以图案布置的接触点(3)的印刷电路板(1)的装置。 该装置包括平行于印刷电路板(1)的针板(4),并可向印刷电路板移动。 该板装有固定针(6),其点以接触点(3)的图案排列。 针(6)及其点被布置成使得它们可以在针板(4)的平面的(x,y)方向上重新定位。

    Device for testing printed circuit boards
    2.
    发明申请
    Device for testing printed circuit boards 失效
    印刷电路板测试装置

    公开(公告)号:US20050237072A1

    公开(公告)日:2005-10-27

    申请号:US10513256

    申请日:2003-05-02

    IPC分类号: G01R1/073 G01R31/28 G01R31/02

    摘要: A device for testing printed circuit boards (1) that have contact points (3) arranged in a pattern. The device includes needle plate (4) that is parallel to the printed circuit board (1) and can be displaced towards the printed circuit board. The plate is equipped with fixed needles (6), whose points are arranged in the pattern of the contact points (3). The needles (6) and their points are arranged so that they can be repositioned in the (x,y) direction of the plane of the needle plate (4).

    摘要翻译: 一种用于测试具有以图案布置的接触点(3)的印刷电路板(1)的装置。 该装置包括平行于印刷电路板(1)的针板(4),并可朝向印刷电路板移动。 该板装有固定针(6),其点以接触点(3)的图案排列。 针(6)及其点被布置成使得它们可以在针板(4)的平面的(x,y)方向上重新定位。

    Device for testing circuit boards
    3.
    发明授权
    Device for testing circuit boards 有权
    电路板测试装置

    公开(公告)号:US06496013B1

    公开(公告)日:2002-12-17

    申请号:US09509250

    申请日:2000-03-23

    IPC分类号: H01H3104

    摘要: An instrument to test electronic components, the instrument including a drive unit electrically connecting the component and electrically driving the component to generate a field in the nearby space. The instrument also includes a test device electrically insulated from the component and mounted in its vicinity in order to measure the field generated by the component. The drive unit is designed to apply a voltage to the component. The test device includes an instrument amplifier measuring the voltage differential of two electrodes positioned at two sites in the electric field generated by the component. One of the electrodes is positioned near the component.

    摘要翻译: 一种用于测试电子部件的仪器,所述仪器包括电连接所述部件并电驱动所述部件以在附近空间中产生场的驱动单元。 该仪器还包括与部件电绝缘并安装在其附近的测试装置,以便测量由部件产生的磁场。 驱动单元设计用于向组件施加电压。 测试装置包括一个仪器放大器,用于测量位于由该部件产生的电场中的两个位置处的两个电极的电压差。 电极中的一个位于组件附近。

    System and method for verifying proper connection of an integrated circuit to a circuit board
    4.
    发明授权
    System and method for verifying proper connection of an integrated circuit to a circuit board 失效
    用于验证集成电路与电路板的正确连接的系统和方法

    公开(公告)号:US06188235B1

    公开(公告)日:2001-02-13

    申请号:US08557039

    申请日:1996-01-23

    IPC分类号: G01R3104

    CPC分类号: G01R31/041

    摘要: A test method for verifying proper connection of a CMOS IC uses measurements of a transistor within the IC which can be done with a conventional transistor tester. The transistor has its base connected to a ground pin of the IC, its collector connected to a signal pin of the IC, and its emitter connected to another signal pin of the IC. A second collector of the transistor is connected to a supply voltage pin. The method uses a first step in which suitable voltages are applied to the emitter, base and first collector to turn the transistor on, whereupon the first collector current and second collector voltage are measured. In a second step, the same voltages are applied to the emitter and base as were applied in the first step and a voltage is applied to the second collector which is equal to the voltage measured there in the first step. In a third step, the first collector current measured in the first step is subtracted from the second collector current of the second step, resulting in the true collector current. Alternatively, the method begins with the same first step as described above and in a second step a voltage equal to that measured at the second collector is applied to the second collector while additional current flowing between the collectors is measured. In a third step, the first collector current from the first step is subtracted from the additional current of the second step to give true collector current.

    摘要翻译: 用于验证CMOS IC的正确连接的测试方法使用可以用常规晶体管测试仪完成的IC内的晶体管的测量。 晶体管的基极连接到IC的接地引脚,其集电极连接到IC的信号引脚,其发射极连接到IC的另一个信号引脚。 晶体管的第二集电极连接到电源电压引脚。 该方法使用第一步骤,其中合适的电压施加到发射极,基极和第一集电极以使晶体管导通,由此测量第一集电极电流和第二集电极电压。 在第二步骤中,在第一步骤中施加相同的电压到发射极和基极,并且将电压施加到第二集电极,其等于在第一步骤中测量的电压。 在第三步骤中,从第二步骤的第二集电极电流中减去在第一步骤中测量的第一集电极电流,导致真正的集电极电流。 或者,该方法以与上述相同的第一步骤开始,并且在第二步骤中,将等于在第二收集器处测得的电压的电压施加到第二集电器,同时测量在集电极之间流过的附加电流。 在第三步骤中,从第二步骤的附加电流中减去第一步骤的第一集电极电流,以产生真正的集电极电流。

    Test device for flat electronic assemblies
    5.
    发明授权
    Test device for flat electronic assemblies 失效
    平板电子组件测试装置

    公开(公告)号:US06307389B1

    公开(公告)日:2001-10-23

    申请号:US08875666

    申请日:1997-12-22

    IPC分类号: G01R102

    CPC分类号: G01R1/06705 G01R1/07392

    摘要: A test device for testing an electronic board assembly with an exposed surface area with electrical connection locations to be contacted for testing includes a probe (32, 45) and a drive system for positioning the probe in orthogonal X and Y directions parallel with the surface area. The drive system includes a probe drive (11) for positioning the probe to contact a selected sub-area of the surface area, the probe drive being movable in all movement coordinates independently of any other probe drives in said test device. The sub-area is selected to include component locations (34) on the board assembly. Several probe drives (11) and several probes can be used at one time, each drive having a probe (13). The probe drives are supported so that the probes (13) can be moved to contact sub-areas adjacent to each other. The probe is an elongated needle with a contact tip and is mounted for pivotal movement. A probe drive can include two transverse drives (15, 17) disposed at different distances from the surface area and movable in different directions (X, Y), at least one of the transverse drives including a gimbal mount for holding the needle (13) for universal movement, the needle being longitudinally movable in the gimbal mount. A vertical drive longitudinally moves the needle and probe toward and away from the surface area.

    摘要翻译: 一种用于测试具有暴露表面区域的电子板组件的测试装置,其具有待接触测试的电连接位置,包括探针(32,45)和用于将探头定位在与表面积平行的正交X和Y方向上的驱动系统 。 所述驱动系统包括探针驱动器(11),用于定位所述探头以接触所述表面区域的所选择的子区域,所述探针驱动器能够在所有移动坐标下移动,独立于所述测试装置中的任何其它探针驱动器。 子区域被选择为包括在板组件上的组件位置(34)。 一次可以使用多个探头驱动器(11)和多个探头,每个驱动器都有一个探头(13)。 探针驱动器被支撑,使得探针(13)可以被移动以接触彼此相邻的子区域。 探头是一个细长的针头,带有一个接触尖端,并安装成用于枢转运动。 探针驱动器可以包括设置在与表面区域不同的距离并可在不同方向(X,Y)上移动的两个横向驱动器),至少一个横向驱动器包括用于保持针头(13)的万向架, 为了通用运动,针可以在万向架安装件中纵向移动。 纵向驱动器将针头和探头纵向移动到远离表面区域。

    Method for testing semiconductor integrated circuits soldered to boards
and use of a transistor tester for this method
    6.
    发明授权
    Method for testing semiconductor integrated circuits soldered to boards and use of a transistor tester for this method 失效
    用于测试焊接到电路板上的半导体集成电路的测试方法和使用该方法的晶体管测试仪

    公开(公告)号:US5280237A

    公开(公告)日:1994-01-18

    申请号:US855666

    申请日:1992-03-23

    申请人: Manfred Buks

    发明人: Manfred Buks

    CPC分类号: G01R31/046 G01R31/316

    摘要: A method for testing a semiconductor integrated circuit soldered into a printed circuit board makes use of the existence of parasitic transistors which occur on integrated circuits having diodes formed thereon. The method includes applying a voltage across the pins of the integrated circuit to be tested, measuring currents resulting from the voltage applied across the pins of the integrated circuit, connecting a transistor tester to selected pins of the integrated circuit, and determining typical control or switching characteristics of a parasitic transistor (1T, 2T) of the semiconducting integrated circuit (IC1, IC2). A commercial transistor tester is usable to perform the method.

    摘要翻译: 用于测试焊接到印刷电路板中的半导体集成电路的方法利用在其上形成有二极管的集成电路上出现的寄生晶体管的存在。 该方法包括在待测试的集成电路的引脚上施加电压,测量由集成电路的引脚施加的电压产生的电流,将晶体管测试器连接到集成电路的选定引脚,以及确定典型的控制或开关 半导体集成电路(IC1,IC2)的寄生晶体管(1T,2T)的特性。 商业晶体管测试器可用于执行该方法。