公开(公告)号：US20060241915A1

公开(公告)日：2006-10-26

申请号：US11101729

申请日：2005-04-08

申请人： Mark Woodward ,  James Stimple ,  Willard MacDonald ,  Jady Palko

发明人： Mark Woodward ,  James Stimple ,  Willard MacDonald ,  Jady Palko

IPC分类号： G06F15/00

CPC分类号： G01R13/345

摘要： A system includes providing a first signal in response to a received signal that has a first timing relationship to an applied signal, adjusting the phase of the first signal to provide a second signal, receiving the second signal and generating a strobe based on a counted number of cycles of the second signal, wherein the strobe has a second timing relationship to the applied signal that is based on the counted number of cycles of the second signal.

摘要翻译： 系统包括响应于与所施加的信号具有第一定时关系的接收信号提供第一信号，调整第一信号的相位以提供第二信号，接收第二信号并基于计数的数字产生选通 的第二信号的周期，其中所述选通与所施加的信号具有基于所计数的所述第二信号的周期数的第二定时关系。

公开(公告)号：US20070266275A1

公开(公告)日：2007-11-15

申请号：US11407515

申请日：2006-04-19

申请人： James Stimple ,  Jady Palko

发明人： James Stimple ,  Jady Palko

IPC分类号： G11B20/20 ,  G06K5/04 ,  G11B5/00

CPC分类号： H04L7/0331 ,  G01R31/31727 ,  G11B20/10009 ,  G11B20/10222 ,  G11B20/14 ,  H03L7/0807 ,  H04L7/033

摘要： A measurement system includes a clock recovery system and a measurement module coupled to the clock recovery system. The clock recovery system has an associated response characteristic. The clock recovery system receives an input signal and recovers a clock signal from the input signal. The measurement module is coupled to the clock recovery system and measures a phase error signal received from the clock recovery system, time-referenced to a trigger signal that is applied to the measurement module, where the phase error signal represents the phase difference between the input signal and the recovered clock signal. A processor applies the associated response characteristic to the measured phase error signal to determine the phase of the input signal.

摘要翻译： 测量系统包括时钟恢复系统和耦合到时钟恢复系统的测量模块。 时钟恢复系统具有相关的响应特性。 时钟恢复系统接收输入信号并从输入信号中恢复时钟信号。 测量模块耦合到时钟恢复系统，并测量从时钟恢复系统接收的相位误差信号，时间参考应用于测量模块的触发信号，其中相位误差信号表示输入端之间的相位差 信号和恢复的时钟信号。 处理器将相关联的响应特性应用于所测量的相位误差信号以确定输入信号的相位。

公开(公告)号：US20070201595A1

公开(公告)日：2007-08-30

申请号：US11361603

申请日：2006-02-24

申请人： James Stimple ,  Jady Palko

发明人： James Stimple ,  Jady Palko

IPC分类号： H03D3/24

CPC分类号： H03L7/085 ,  H04L7/0004 ,  H04L7/033 ,  H04W8/26 ,  H04W88/08

摘要： A clock recovery system includes a signal summer, a signal source, and an analog-to-digital converter (ADC) interposed in a phase locked loop (PLL). The ADC measures a calibration error signal with the signal source providing a stimulus signal to the signal summer, with a data signal applied to a phase detector within the PLL, and with the PLL in a phase locked state. One or more response characteristics of the PLL are determined based on the measured calibration error signal. The one or more response characteristics can be applied to measurements of a measurement error signal acquired by the ADC with the stimulus signal not provided to the signal summer, with the data signal applied to the phase detector, and with the PLL in the phase locked state.

摘要翻译： 时钟恢复系统包括信号加法器，信号源和插入在锁相环（PLL）中的模数转换器（ADC）。 ADC测量校准误差信号，信号源为信号加法器提供刺激信号，数据信号施加到PLL内的相位检测器，PLL处于锁相状态。 基于所测量的校准误差信号来确定PLL的一个或多个响应特性。 一个或多个响应特性可以应用于由ADC获得的测量误差信号的测量，其中没有提供给信号加法器的激励信号，数据信号被施加到相位检测器，并且PLL处于锁相状态 。

公开(公告)号：US07571339B2

公开(公告)日：2009-08-04

申请号：US11407515

申请日：2006-04-19

申请人： James R Stimple ,  Jady Palko

发明人： James R Stimple ,  Jady Palko

IPC分类号： G06F1/04

CPC分类号： H04L7/0331 ,  G01R31/31727 ,  G11B20/10009 ,  G11B20/10222 ,  G11B20/14 ,  H03L7/0807 ,  H04L7/033

摘要： A measurement system includes a clock recovery system and a measurement module coupled to the clock recovery system. The clock recovery system has an associated response characteristic. The clock recovery system receives an input signal and recovers a clock signal from the input signal. The measurement module is coupled to the clock recovery system and measures a phase error signal received from the clock recovery system, time-referenced to a trigger signal that is applied to the measurement module, where the phase error signal represents the phase difference between the input signal and the recovered clock signal. A processor applies the associated response characteristic to the measured phase error signal to determine the phase of the input signal.

摘要翻译： 测量系统包括时钟恢复系统和耦合到时钟恢复系统的测量模块。 时钟恢复系统具有相关的响应特性。 时钟恢复系统接收输入信号并从输入信号中恢复时钟信号。 测量模块耦合到时钟恢复系统，并测量从时钟恢复系统接收的相位误差信号，时间参考应用于测量模块的触发信号，其中相位误差信号表示输入端之间的相位差 信号和恢复的时钟信号。 处理器将相关联的响应特性应用于所测量的相位误差信号以确定输入信号的相位。

公开(公告)号：US20080072130A1

公开(公告)日：2008-03-20

申请号：US11444734

申请日：2006-05-31

申请人： James R. Stimple ,  Jady Palko

发明人： James R. Stimple ,  Jady Palko

IPC分类号： G06F11/00

CPC分类号： H04L7/08 ,  H04L7/033

摘要： A measurement system recovers a clock signal from an applied signal that includes a repeating bit pattern, provides a trigger signal synchronized to occurrences of the repeating bit pattern, acquires a set of data samples time-referenced to the trigger signal, and acquires a set of phase error samples of a phase error signal provided by a clock recovery system, wherein the acquired set of phase error samples is also time-referenced to the trigger signal.

摘要翻译： 测量系统从包括重复位模式的施加信号恢复时钟信号，提供与重复位模式发生同步的触发信号，获取时间参考触发信号的一组数据采样，并获取一组 由时钟恢复系统提供的相位误差信号的相位误差样本，其中所获取的相位误差采样集合也以时间参考触发信号。