公开(公告)号：US12174781B2

公开(公告)日：2024-12-24

申请号：US18135472

申请日：2023-04-17

Applicant: Marvell Asia Pte Ltd

Inventor： Radhakrishnan L. Nagarajan ,  Chao Xu

IPC: G06F15/78 ,  G02B6/12 ,  G06F13/364 ,  G06F13/40 ,  G06F13/42 ,  H04B10/40 ,  H04B10/69 ,  H04B10/80 ,  H04L1/00 ,  H04L25/03 ,  H04L27/00 ,  H04L5/14 ,  H04L27/02 ,  H04L27/18 ,  H04L27/34

Abstract: A hybrid electrical and optic system-on-chip (SOC) device configured for both electrical and optic communication includes a substrate, an electrical device configured for electrical communication arranged on the substrate, a photonics device configured for optic communication arranged on the substrate, and a self-test module arranged on the substrate. The self-test module is configured to receive a loop-back signal indicative of an optical signal output from the photonics device and calibrate the photonics device based on the loop-back signal.

公开(公告)号：US11630799B2

公开(公告)日：2023-04-18

申请号：US17751212

申请日：2022-05-23

Applicant: Marvell Asia Pte Ltd.

Inventor： Radhakrishnan L. Nagarajan ,  Chao Xu

IPC: G06F15/78 ,  G06F13/42 ,  G02B6/12 ,  H04B10/80 ,  H04B10/40 ,  H04B10/69 ,  H04L27/00 ,  G06F13/364 ,  G06F13/40 ,  H04L1/00 ,  H04L25/03 ,  H04L5/14 ,  H04L27/02 ,  H04L27/18 ,  H04L27/34

Abstract: A hybrid electrical and optic system-on-chip (SOC) device configured for both electrical and optic communication includes a substrate, an electrical device configured for electrical communication arranged on the substrate, a photonics device configured for optic communication arranged on the substrate, and a self-test module arranged on the substrate. The self-test module is configured to receive a loop-back signal indicative of an optical signal output from the photonics device and calibrate the photonics device based on the loop-back signal.

公开(公告)号：US11341083B2

公开(公告)日：2022-05-24

申请号：US17088197

申请日：2020-11-03

Applicant: Marvell Asia Pte Ltd.

Inventor： Radhakrishnan L. Nagarajan ,  Chao Xu

IPC: G06F15/78 ,  G06F13/42 ,  H04B10/80 ,  H04B10/40 ,  H04B10/556 ,  H04B10/54 ,  H04B10/516 ,  H04B10/69 ,  H04B14/02 ,  G02B6/12 ,  H04L27/00 ,  G06F13/364 ,  G06F13/40 ,  H04L1/00 ,  H04L25/03 ,  H04L5/14 ,  H04L27/02 ,  H04L27/18 ,  H04L27/34

Abstract: The present invention includes an integrated system-on-chip device configured on a substrate member. The device has a data input/output interface provided on the substrate member and configured for a predefined data rate and protocol. The device has an input/output block provided on the substrate member and coupled to the data input/output interface. The input/output block comprises a SerDes block, a CDR block, a compensation block, and an equalizer block. The SerDes block is configured to convert a first data stream of N having a first predefined data rate at a first clock rate into a second data stream of M having a second predefined data rate at a second clock rate. The device has a driver module provided on the substrate member and coupled to a signal processing block, and a driver interface provided on the substrate member and coupled to the driver module and a silicon photonics device.