摘要:
A circuit board designing device has a database that stores an another-component arrangement forbidden range table, a related component information table, and a relative-arranging position table, and a processing unit that executes arrangement of the components, determines the another-component arrangement forbidden range which is set to forbid arrangement of another component in the predetermined range on the basis of the arranging position of the basic component with reference to the another-component arrangement forbidden range table when arrangement of the basic component is instructed, acquires related component information corresponding to the related component to be combined with the basic components with reference to the related component information table, acquires a relative-arranging position of the related component from the relative-arranging position table on the basis of the acquired related component information, and sets the acquired related component in the another-component arrangement forbidden range when a predetermined condition is satisfied.
摘要:
A design-support-apparatus includes a storage unit that stores mounting information on an order of manufacturing processes, first-region-information indicating a region to be secured in mounting of each component on the substrate, second-region-information indicating a region occupied when each component is mounted on the substrate, a discrimination unit configured to determine a before-and-after relationship between manufacturing processes of mounting a first-component and a second-component that are arranged on the substrate, an acquisition unit configured to acquire the first-region-information for the component of which the manufacturing process is determined to be later by the discrimination unit between the first component and the second-component and acquire the second-region-information for the component of which the manufacturing process is determined to be earlier, and a determination unit configured to compare the first-region-information and the second-region-information so as to determine presence of interference.
摘要:
In designing integrated circuits such as FPGAs, a design support environment including the quality of design data is improved and the design efficiency is improved. An integrated-circuit design support apparatus that supports designing of an integrated circuit having a plurality of pins is provided. The apparatus includes a processor (a central processing unit) that forms a pin layout matrix (a matrix sheet) by unifying pin layout information of the integrated circuit using a common format and arranging the pin layout information in coordinates. The processor creates an integrated-circuit design library from the pin layout matri
摘要:
This invention is directed to a method and apparatus to find out an optimum solution in automatic routing or automatic placement with certainty and at a high-speed to improve a routing rate, and to realize automatic routing in a high-density. To these end, a routing approach is selected in a conversational mode while routing efficiency is consulted to compose routing processing procedure so as to generate a routing program. Besides, component placement processing procedures designated according to placement control information are combined to generate the placement program. A straight line between component pins adjacent to each other is defined as a chord, a wave for maze method routing is generated from a start point toward an end point of a routing path and propagated between the chords adjacent to each other. Positions of the chords through which the wave has passed until reaching the end point from the start point are successively stored and the positions through which the wave has passed is traced back to the start point from the end point when the wave reaches the end point to decide a routing path of the routing pattern. The method and apparatus of this invention are applicable to routing design or component placement design of LSIs, multichip modules, printed circuit boards, etc.
摘要:
In designing integrated circuits such as FPGAs, a design support environment including the quality of design data is improved and the design efficiency is improved. An integrated-circuit design support apparatus that supports designing of an integrated circuit having a plurality of pins is provided. The apparatus includes a processor (a central processing unit) that forms a pin layout matrix (a matrix sheet) by unifying pin layout information of the integrated circuit using a common format and arranging the pin layout information in coordinates. The processor creates an integrated-circuit design library from the pin layout matrix.
摘要:
Disclosed is an interactive CAD apparatus for logic circuit packaging design, wherein provisions are made to display delay times in real time when a component is being moved, so that error-contributing components and interconnections can be easily identified and the optimum position can be easily determined. The apparatus includes: a component moving unit, responsive to an operator's instruction, for moving a component on a display screen where a component placement diagram is displayed; an associated path extraction unit for extracting a signal path associated with the component being moved by the component moving unit; a temporary position calculation unit for calculating temporary position data representing a placement position corresponding to the position of the component on the display screen at prescribed intervals of time when the component is being moved by the component moving unit; an associated path delay calculation unit for successively calculating delay values for the signal path extracted by the associated path extraction unit, based on the temporary position data calculated by the temporary position calculation unit; and an associated path delay display unit for successively displaying the delay values calculated by the associated path delay calculation unit.