公开(公告)号：US07418703B2

公开(公告)日：2008-08-26

申请号：US10390595

申请日：2003-03-19

申请人： Masato Edahiro ,  Yoshiyuki Ito ,  Junji Sakai ,  Tetsuya Minakami ,  Hiroaki Inoue

发明人： Masato Edahiro ,  Yoshiyuki Ito ,  Junji Sakai ,  Tetsuya Minakami ,  Hiroaki Inoue

IPC分类号： G06F9/46

CPC分类号： G06F9/5066

摘要： The present invention relates to a parallel processing system by an OS for single processor capable of operating an OS for single processor and an existing application on a multiprocessor and achieving parallel processing by a multiprocessor with respect to the application, wherein the multiprocessor are logically divided into two groups, i.e., a first processor side and a second processor side, and units of work that are parallelizable within the application operating on the processors on the first processor side are controlled as new units of work on the processors on the second processor side.

公开(公告)号：US07464377B2

公开(公告)日：2008-12-09

申请号：US10421717

申请日：2003-04-24

申请人： Masato Edahiro ,  Junji Sakai ,  Tetsuya Minakami ,  Yoshiyuki Ito ,  Hiroaki Inoue

发明人： Masato Edahiro ,  Junji Sakai ,  Tetsuya Minakami ,  Yoshiyuki Ito ,  Hiroaki Inoue

IPC分类号： G06F9/46 ,  G06F15/16

CPC分类号： G06F9/547

摘要： In the application parallel processing system, on specific one of processors forming a multi-processor, an application is operated independently of other processors and on other processors, a function expansion module is operated in parallel processing under control of the application. As a result, even in such a data processing device internally provided with a processor whose processing capacity is small as a portable terminal, applications can be operated smoothly.

摘要翻译： 在应用并行处理系统中，在形成多处理器的特定处理器之一上，应用程序独立于其他处理器运行，而在其他处理器上，在应用程序的控制下，功能扩展模块被并行处理。 结果，即使在内部设置有作为便携式终端的处理能力较小的处理器的这种数据处理设备中，也可以顺利地进行应用。

公开(公告)号：US20080256550A1

公开(公告)日：2008-10-16

申请号：US12213190

申请日：2008-06-16

申请人： Masato Edahiro ,  Yoshiyuki Ito ,  Junji Sakai ,  Tetsuya Minakami ,  Hiroaki Inoue

发明人： Masato Edahiro ,  Yoshiyuki Ito ,  Junji Sakai ,  Tetsuya Minakami ,  Hiroaki Inoue

IPC分类号： G06F9/46

CPC分类号： G06F9/5066

摘要： The present invention relates to a parallel processing system by an OS for single processor capable of operating an OS for single processor and an existing application on a multiprocessor and achieving parallel processing by a multiprocessor with respect to the application, wherein the multiprocessor are logically divided into two groups, i.e., a first processor side and a second processor side, and units of work that are parallelizable within the application operating on the processors on the first processor side are controlled as new units of work on the processors on the second processor side.

摘要翻译： 本发明涉及一种用于单处理器的OS的并行处理系统，其能够操作用于单处理器的OS和多处理器上的现有应用，并且实现相对于应用的多处理器的并行处理，其中多处理器被逻辑地分为 两个组，即第一处理器侧和第二处理器侧，以及在第一处理器侧的处理器上操作的应用内可并行化的工作单元被控制为第二处理器侧的处理器上的新的工作单元。

公开(公告)号：US20070130446A1

公开(公告)日：2007-06-07

申请号：US11607888

申请日：2006-12-04

申请人： Tetsuya Minakami

发明人： Tetsuya Minakami

IPC分类号： G06F15/00

CPC分类号： G06F9/3879 ,  G06F9/485 ,  G06F15/177 ,  G06F15/7842 ,  Y02D10/13 ,  Y02D10/24

摘要： In a processor apparatus, at least one general purpose central processing unit loads object codes of requested newly-dispatched tasks to a memory. At least one specific signal processing unit core downloads the object codes of the newly-dispatched tasks from the memory to dynamically schedule generation and extinction of the newly-dispatched tasks and schedules operations of currently-executed tasks in accordance with instructions from the general purpose central processing unit.

摘要翻译： 在处理器装置中，至少一个通用中央处理单元将所请求的新派遣的任务的对象代码加载到存储器。 至少一个特定的信号处理单元核心从存储器下载新调度的任务的目标代码，以动态调度新派遣的任务的生成和消灭，并且根据来自通用中心的指令调度当前执行的任务的操作 处理单元。

公开(公告)号：US06850275B1

公开(公告)日：2005-02-01

申请号：US09588353

申请日：2000-06-07

申请人： Tetsuya Minakami

发明人： Tetsuya Minakami

IPC分类号： H04N5/208 ,  H04N5/14 ,  H04N5/262 ,  H04N9/04

CPC分类号： H04N5/361 ,  H04N5/142 ,  H04N9/045

摘要： An edge correction apparatus for a digital video camera includes horizontal and vertical edge signal generators, horizontal and vertical edge signal gain controllers, an adder, a slice processor, and a vertical edge component suppression position detector. The horizontal and vertical edge signal generators respectively generate horizontal and vertical edge correction signals in the horizontal and vertical directions of a sensed image obtained via the image sensing element of a digital video camera. The horizontal and vertical edge signal gain controllers control the gains of the horizontal and vertical edge correction signals. The adder adds the horizontal and vertical edge correction signals whose gains are controlled. The slice processor adds, to the image processing signal of the digital video camera, an edge correction signal obtained by performing slice processing for an edge signal output from the adder. The vertical edge component suppression position detector causes the vertical edge signal gain controller to execute gain control of the vertical edge correction signal in accordance with a horizontal difference signal output from the horizontal edge signal generator.

摘要翻译： 用于数字摄像机的边缘校正装置包括水平和垂直边缘信号发生器，水平和垂直边缘信号增益控制器，加法器，切片处理器和垂直边缘分量抑制位置检测器。 水平和垂直边缘信号发生器分别在通过数字摄像机的图像感测元件获得的感测图像的水平和垂直方向上产生水平和垂直边缘校正信号。 水平和垂直边缘信号增益控制器控制水平和垂直边缘校正信号的增益。 加法器将增益控制的水平和垂直边缘校正信号相加。 切片处理器对数字摄像机的图像处理信号加上通过对从加法器输出的边缘信号执行切片处理而获得的边缘校正信号。 垂直边缘成分抑制位置检测器使垂直边缘信号增益控制器根据从水平边缘信号发生器输出的水平差信号来执行垂直边缘校正信号的增益控制。