公开(公告)号：US20130270554A1

公开(公告)日：2013-10-17

申请号：US13860879

申请日：2013-04-11

申请人： Masatoshi YOKOYAMA ,  Tsutomu MURAKAWA ,  Kenichi OKAZAKI ,  Masayuki SAKAKURA ,  Takuya MATSUO ,  Yosuke KANZAKI ,  Hiroshi MATSUKIZONO ,  Yoshitaka YAMAMOTO

发明人： Masatoshi YOKOYAMA ,  Tsutomu MURAKAWA ,  Kenichi OKAZAKI ,  Masayuki SAKAKURA ,  Takuya MATSUO ,  Yosuke KANZAKI ,  Hiroshi MATSUKIZONO ,  Yoshitaka YAMAMOTO

IPC分类号： H01L29/786

CPC分类号： H01L29/7869 ,  H01L29/78696

摘要： The semiconductor conductor device includes a gate electrode 106, an oxide semiconductor film 110, a source electrode 114a and a drain electrode 114b, and a channel region formed in the oxide semiconductor film. The channel region is formed between a first side surface 214a of the source electrode and a second side surface 214b of the drain electrode opposite to the first side surface 214a. The oxide semiconductor film has a side surface which overlaps with the gate electrode, which has a first high resistance region positioned between a first region 206a that is the nearest to one end 314a of the first side surface 214a and a second region 206b that is the nearest to one end 314b of the second side surface 214b. The first high resistance region has a corrugated side surface or the like.

摘要翻译： 半导体导体器件包括栅电极106，氧化物半导体膜110，源极114a和漏电极114b以及形成在氧化物半导体膜中的沟道区。 沟道区形成在源电极的第一侧表面214a和与第一侧表面214a相对的漏电极的第二侧表面214b之间。 氧化物半导体膜具有与栅电极重叠的侧面，该侧面具有位于最靠近第一侧面214a的一端314a的第一区域206a和位于第一侧面214a的一端314a的第一区域206a之间的第一高电阻区域， 最靠近第二侧表面214b的一端314b。 第一高电阻区域具有波纹状的侧面等。

公开(公告)号：US20160276489A1

公开(公告)日：2016-09-22

申请号：US15168291

申请日：2016-05-31

申请人： Kenichi OKAZAKI ,  Masatoshi YOKOYAMA ,  Masayuki SAKAKURA ,  Yukinori SHIMA ,  Yosuke KANZAKI ,  Hiroshi MATSUKIZONO ,  Takuya MATSUO ,  Yoshitaka YAMAMOTO

发明人： Kenichi OKAZAKI ,  Masatoshi YOKOYAMA ,  Masayuki SAKAKURA ,  Yukinori SHIMA ,  Yosuke KANZAKI ,  Hiroshi MATSUKIZONO ,  Takuya MATSUO ,  Yoshitaka YAMAMOTO

IPC分类号： H01L29/786 ,  H01L29/66

CPC分类号： H01L29/7869 ,  H01L21/02172 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78696

摘要： An object is to suppress conducting-mode failures of a transistor that uses an oxide semiconductor film and has a short channel length. A semiconductor device includes a gate electrode 304, a gate insulating film 306 formed over the gate electrode, an oxide semiconductor film 308 over the gate insulating film, and a source electrode 310a and a drain electrode 310b formed over the oxide semiconductor film. The channel length L of the oxide semiconductor film is more than or equal to 1 μm and less than or equal to 50 μm. The oxide semiconductor film has a peak at a rotation angle 2θ in the vicinity of 31° in X-ray diffraction measurement.

摘要翻译： 目的是抑制使用氧化物半导体膜并具有短沟道长度的晶体管的导通模式故障。 半导体器件包括栅电极304，形成在栅电极上的栅极绝缘膜306，栅极绝缘膜上的氧化物半导体膜308以及形成在氧化物半导体膜上的源电极310a和漏电极310b。 氧化物半导体膜的沟道长度L大于等于1μm且小于等于50μm。 氧化物半导体膜在X射线衍射测定中具有在31°附近的旋转角度2θ的峰值。

公开(公告)号：US20130270553A1

公开(公告)日：2013-10-17

申请号：US13860855

申请日：2013-04-11

申请人： Masatoshi YOKOYAMA ,  Tsutomu MURAKAWA ,  Kenichi OKAZAKI ,  Masayuki SAKAKURA ,  Takuya MATSUO ,  Akihiro ODA ,  Shigeyasu MORI ,  Yoshitaka YAMAMOTO

发明人： Masatoshi YOKOYAMA ,  Tsutomu MURAKAWA ,  Kenichi OKAZAKI ,  Masayuki SAKAKURA ,  Takuya MATSUO ,  Akihiro ODA ,  Shigeyasu MORI ,  Yoshitaka YAMAMOTO

IPC分类号： H01L29/786

CPC分类号： H01L29/7869

摘要： Provided is a semiconductor device in which generation of a parasitic channel in an end region of an oxide semiconductor film is suppressed. The semiconductor device includes a gate electrode, an oxide semiconductor film, a source electrode and a drain electrode, and a channel region formed in the oxide semiconductor film. The channel region is formed between a first side surface of the source electrode and a second side surface of the drain electrode opposite to the first side surface. The oxide semiconductor film has an end region which does not overlap with the gate electrode. The end region which does not overlap with the gate electrode is positioned between a first region that is the nearest to one end of the first side surface and a second region that is the nearest to one end of the second side surface.

摘要翻译： 提供了抑制氧化物半导体膜的端部区域中的寄生通道的产生的半导体装置。 半导体器件包括栅电极，氧化物半导体膜，源电极和漏极，以及形成在氧化物半导体膜中的沟道区。 沟道区形成在源电极的第一侧表面和与第一侧表面相对的漏电极的第二侧表面之间。 氧化物半导体膜具有不与栅电极重叠的端部区域。 不与栅电极重叠的端部区域位于最靠近第一侧表面的一端的第一区域和最靠近第二侧表面的一端的第二区域之间。

公开(公告)号：US20120001179A1

公开(公告)日：2012-01-05

申请号：US13166073

申请日：2011-06-22

申请人： Shunpei YAMAZAKI ,  Masahiro TAKAHASHI ,  Takuya HIROHASHI ,  Katsuaki TOCHIBAYASHI ,  Yasutaka NAKAZAWA ,  Masatoshi YOKOYAMA

发明人： Shunpei YAMAZAKI ,  Masahiro TAKAHASHI ,  Takuya HIROHASHI ,  Katsuaki TOCHIBAYASHI ,  Yasutaka NAKAZAWA ,  Masatoshi YOKOYAMA

IPC分类号： H01L29/786

CPC分类号： H01L29/7869 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/78606 ,  H01L29/78693

摘要： It is an object to provide a semiconductor device including an oxide semiconductor, which has stable electric characteristics and high reliability. A semiconductor device having a stacked-layer structure of a gate insulating layer; a first gate electrode in contact with one surface of the gate insulating layer; an oxide semiconductor layer in contact with the other surface of the gate insulating layer and overlapping with the first gate electrode; and a source electrode, a drain electrode, and an oxide insulating layer which are in contact with the oxide semiconductor layer is provided, in which the nitrogen concentration of the oxide semiconductor layer is 2×1019 atoms/cm3 or lower and the source electrode and the drain electrode include one or more of tungsten, platinum, and molybdenum.

摘要翻译： 本发明的目的是提供一种具有稳定的电特性和高可靠性的氧化物半导体的半导体装置。 一种具有栅极绝缘层的叠层结构的半导体器件; 与所述栅极绝缘层的一个表面接触的第一栅电极; 与所述栅绝缘层的另一表面接触并与所述第一栅电极重叠的氧化物半导体层; 并且提供与氧化物半导体层接触的源电极，漏电极和氧化物绝缘层，其中氧化物半导体层的氮浓度为2×1019原子/ cm3以下，源电极和 漏极包括钨，铂和钼中的一种或多种。