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公开(公告)号:US20130270554A1
公开(公告)日:2013-10-17
申请号:US13860879
申请日:2013-04-11
申请人: Masatoshi YOKOYAMA , Tsutomu MURAKAWA , Kenichi OKAZAKI , Masayuki SAKAKURA , Takuya MATSUO , Yosuke KANZAKI , Hiroshi MATSUKIZONO , Yoshitaka YAMAMOTO
发明人: Masatoshi YOKOYAMA , Tsutomu MURAKAWA , Kenichi OKAZAKI , Masayuki SAKAKURA , Takuya MATSUO , Yosuke KANZAKI , Hiroshi MATSUKIZONO , Yoshitaka YAMAMOTO
IPC分类号: H01L29/786
CPC分类号: H01L29/7869 , H01L29/78696
摘要: The semiconductor conductor device includes a gate electrode 106, an oxide semiconductor film 110, a source electrode 114a and a drain electrode 114b, and a channel region formed in the oxide semiconductor film. The channel region is formed between a first side surface 214a of the source electrode and a second side surface 214b of the drain electrode opposite to the first side surface 214a. The oxide semiconductor film has a side surface which overlaps with the gate electrode, which has a first high resistance region positioned between a first region 206a that is the nearest to one end 314a of the first side surface 214a and a second region 206b that is the nearest to one end 314b of the second side surface 214b. The first high resistance region has a corrugated side surface or the like.
摘要翻译: 半导体导体器件包括栅电极106,氧化物半导体膜110,源极114a和漏电极114b以及形成在氧化物半导体膜中的沟道区。 沟道区形成在源电极的第一侧表面214a和与第一侧表面214a相对的漏电极的第二侧表面214b之间。 氧化物半导体膜具有与栅电极重叠的侧面,该侧面具有位于最靠近第一侧面214a的一端314a的第一区域206a和位于第一侧面214a的一端314a的第一区域206a之间的第一高电阻区域, 最靠近第二侧表面214b的一端314b。 第一高电阻区域具有波纹状的侧面等。
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公开(公告)号:US20130270553A1
公开(公告)日:2013-10-17
申请号:US13860855
申请日:2013-04-11
申请人: Masatoshi YOKOYAMA , Tsutomu MURAKAWA , Kenichi OKAZAKI , Masayuki SAKAKURA , Takuya MATSUO , Akihiro ODA , Shigeyasu MORI , Yoshitaka YAMAMOTO
发明人: Masatoshi YOKOYAMA , Tsutomu MURAKAWA , Kenichi OKAZAKI , Masayuki SAKAKURA , Takuya MATSUO , Akihiro ODA , Shigeyasu MORI , Yoshitaka YAMAMOTO
IPC分类号: H01L29/786
CPC分类号: H01L29/7869
摘要: Provided is a semiconductor device in which generation of a parasitic channel in an end region of an oxide semiconductor film is suppressed. The semiconductor device includes a gate electrode, an oxide semiconductor film, a source electrode and a drain electrode, and a channel region formed in the oxide semiconductor film. The channel region is formed between a first side surface of the source electrode and a second side surface of the drain electrode opposite to the first side surface. The oxide semiconductor film has an end region which does not overlap with the gate electrode. The end region which does not overlap with the gate electrode is positioned between a first region that is the nearest to one end of the first side surface and a second region that is the nearest to one end of the second side surface.
摘要翻译: 提供了抑制氧化物半导体膜的端部区域中的寄生通道的产生的半导体装置。 半导体器件包括栅电极,氧化物半导体膜,源电极和漏极,以及形成在氧化物半导体膜中的沟道区。 沟道区形成在源电极的第一侧表面和与第一侧表面相对的漏电极的第二侧表面之间。 氧化物半导体膜具有不与栅电极重叠的端部区域。 不与栅电极重叠的端部区域位于最靠近第一侧表面的一端的第一区域和最靠近第二侧表面的一端的第二区域之间。
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公开(公告)号:US20090140053A1
公开(公告)日:2009-06-04
申请号:US12275870
申请日:2008-11-21
申请人: Shunpei YAMAZAKI , Yuugo GOTO , Tsutomu MURAKAWA
发明人: Shunpei YAMAZAKI , Yuugo GOTO , Tsutomu MURAKAWA
IPC分类号: G06K19/077 , H01L29/00 , H01L29/786
CPC分类号: H01L27/1218
摘要: A semiconductor device in which damages to an element such as a transistor are reduced even when external force such as bending is applied and stress is generated in the semiconductor device. The semiconductor device includes a first island-like reinforcement film over a substrate having flexibility; a semiconductor film including a channel formation region and an impurity region over the first island-like reinforcement film; a first conductive film over the channel formation region with a gate insulating film interposed therebetween; a second island-like reinforcement film covering the first conductive film and the gate insulating film.
摘要翻译: 即使在施加诸如弯曲的外力并且在半导体器件中产生应力的情况下,诸如晶体管的元件的损坏也减小的半导体器件。 半导体器件包括在具有柔性的衬底上的第一岛状增强膜; 包括第一岛状增强膜上的沟道形成区域和杂质区域的半导体膜; 在沟道形成区域上的第一导电膜,其间插入有栅极绝缘膜; 覆盖第一导电膜和栅极绝缘膜的第二岛状加强膜。
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公开(公告)号:US20120258575A1
公开(公告)日:2012-10-11
申请号:US13437271
申请日:2012-04-02
申请人: Yuhei SATO , Keiji SATO , Toshinari SASAKI , Tetsunori MARUYAMA , Atsuo ISOBE , Tsutomu MURAKAWA , Sachiaki TEZUKA
发明人: Yuhei SATO , Keiji SATO , Toshinari SASAKI , Tetsunori MARUYAMA , Atsuo ISOBE , Tsutomu MURAKAWA , Sachiaki TEZUKA
IPC分类号: H01L21/336
CPC分类号: H01L29/7869 , H01L21/477
摘要: To provide a highly reliable semiconductor device manufactured by giving stable electric characteristics to a semiconductor device including an oxide semiconductor. In a manufacturing process of a transistor, an oxide semiconductor layer, a source electrode layer, a drain electrode layer, a gate insulating film, a gate electrode layer, and an aluminum oxide film are formed in this order, and then heat treatment is performed on the oxide semiconductor layer and the aluminum oxide film, whereby an oxide semiconductor layer from which an impurity containing a hydrogen atom is removed and which includes a region containing oxygen more than the stoichiometric proportion is formed. In addition, when the aluminum oxide film is formed, entry and diffusion of water or hydrogen into the oxide semiconductor layer from the air due to heat treatment in a manufacturing process of a semiconductor device or an electronic appliance including the transistor can be prevented.
摘要翻译: 提供通过给包括氧化物半导体的半导体器件赋予稳定的电特性而制造的高可靠性的半导体器件。 在晶体管的制造工序中,依次形成氧化物半导体层,源极电极层,漏极电极层,栅极绝缘膜,栅电极层和氧化铝膜,然后进行热处理 在氧化物半导体层和氧化铝膜上形成除去含有氢原子的杂质的氧化物半导体层,其中含有超过化学计量比的氧的区域。 此外,当形成氧化铝膜时,可以防止在半导体器件或包括晶体管的电子设备的制造过程中由于热处理而从空气中进入和扩散水或氢进入氧化物半导体层。
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