公开(公告)号：US20140362936A1

公开(公告)日：2014-12-11

申请号：US13912847

申请日：2013-06-07

Applicant: MediaTek Inc.

Inventor： Wei-Cheng TANG ,  Juiyuan TSAI ,  Pao-Cheng CHIU

IPC: H04B7/04 ,  H04W56/00

CPC classification number: H04B7/0413 ,  H04W56/0015

Abstract: A communication circuit and a communication device are provided. The communication circuit includes first, second, and third RF transceivers, first and second baseband transceivers, and first and second modem circuits. The first and second RF transceivers are configured to down-convert first and second RF signals for MIMO. The third RF transceiver is configured to down-convert a third RF signal for a second telecommunication technology. The first baseband transceiver is configured to digitize the down-converted first RF signal to output a first baseband signal. The second baseband transceiver is configured to digitize one of the down-converted second or third RF signals according to a selection signal to output a second baseband signal. The first modem circuit is configured to digitally process the first and second baseband signals using the MIMO technology. The second modem circuit is configured to digitally process the second baseband signal using the second telecommunication technology.

Abstract translation: 提供通信电路和通信设备。 通信电路包括第一，第二和第三RF收发器，第一和第二基带收发器以及第一和第二调制解调器电路。 第一和第二RF收发器被配置为对用于MIMO的第一和第二RF信号进行下变频。 第三RF收发器被配置为对第二电信技术的第三RF信号进行下变频。 第一基带收发器被配置为对下变频的第一RF信号进行数字化以输出第一基带信号。 第二基带收发器被配置为根据选择信号对下变频的第二或第三RF信号之一进行数字化，以输出第二基带信号。 第一调制解调器电路被配置为使用MIMO技术对第一和第二基带信号进行数字处理。 第二调制解调器电路被配置为使用第二电信技术对第二基带信号进行数字处理。

公开(公告)号：US20150263756A1

公开(公告)日：2015-09-17

申请号：US14576315

申请日：2014-12-19

Applicant: MediaTek Inc.

Inventor： Pao-Cheng CHIU ,  Wei-Hsin TSENG

IPC: H03M1/46 ,  H03M1/20 ,  H03M1/08

CPC classification number: H03M1/468 ,  H03M1/0607 ,  H03M1/08 ,  H03M1/1061

Abstract: Analog-to-digital-converters (ADC) are provided. The ADC contains a first capacitive digital-to-analog-converter (CDAC) and a control circuit. The CDAC, including n bit, is configured to connect a kth bit of the n bits to a first voltage reference to provide a first analog signal, convert the first analog signal into first digital code using 0th through (k−1)th bits that are less significant than the kth bit, connect the kth bit of the n bits to a second voltage reference to provide a second analog signal, and convert the second analog signal into second digital code using the 0th through (k−1)th bits that are less significant than the kth bit. The control circuit is configured to estimate a weight of the kth bit based on the first and second digital code.

Abstract translation: 提供模数转换器（ADC）。 ADC包含第一个电容数模转换器（CDAC）和一个控制电路。 包括n位的CDAC被配置为将n位的第k位连接到第一参考电压以提供第一模拟信号，使用第0到第（k-1）位将第一模拟信号转换为第一数字码， 比第k位更不重要，将n位的第k位连接到第二参考电压以提供第二模拟信号，并且使用第0到第（k-1）位将第二模拟信号转换为第二数字码， 不如第k位显着。 控制电路被配置为基于第一和第二数字码估计第k位的权重。