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公开(公告)号：US08645634B1
公开(公告)日：2014-02-04
申请号：US12355648
申请日：2009-01-16
CPC分类号： G06F13/28
摘要： One embodiment of the present invention sets forth a technique for reducing the copying of data between memory allocated to a primary processor and a coprocessor is disclosed. The system memory is aliased as device memory to allow the coprocessor and the primary processor to share the same portion of memory. Either device may write and/or read the shared portion of memory to transfer data between the devices rather than copying data from a portion of memory that is only accessible by one device to a different portion of memory that is only accessible by the other device. Removal of the need for explicit primary processor memory to coprocessor memory and coprocessor memory to primary processor memory copies improves the performance of the application and reduces physical memory requirements for the application since one portion of memory is shared rather than allocating separate private portions of memory.
摘要翻译： 本发明的一个实施例提出了一种用于减少分配给主处理器和协处理器的存储器之间的数据复制的技术。 系统存储器被别名为设备存储器，以允许协处理器和主处理器共享存储器的相同部分。 任一设备可以写入和/或读取存储器的共享部分以在设备之间传送数据，而不是将数据从只能由一个设备访问的存储器的一部分复制到只能由另一个设备访问的存储器的不同部分。 清除对处理器内存和协处理器存储器到主处理器存储器副本的明确的主处理器存储器的需要改进了应用的性能，并减少了应用的物理存储器要求，因为一部分存储器被共享而不是分配存储器的独立私有部分。
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公开(公告)号：US07920701B1
公开(公告)日：2011-04-05
申请号：US11304408
申请日：2005-12-14
IPC分类号： H04N7/167
CPC分类号： H04N21/4367 , H04N21/42646 , H04N21/4325 , H04N21/4405 , H04N21/4408
摘要： A digital content system is disclosed. A security engine disposed in a bridge provides cryptographic services. Clear text digital data received from a central processing unit is encrypted and transferred via the bridge over unsecured data paths as cipher text.
摘要翻译： 公开了数字内容系统。 布置在桥中的安全引擎提供加密服务。 从中央处理单元接收到的清除文本数字数据被加密并通过不安全数据路径作为密文通过桥传输。
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公开(公告)号：US09158896B2
公开(公告)日：2015-10-13
申请号：US12029432
申请日：2008-02-11
CPC分类号： G06F21/10 , G06F21/575 , G06F21/72 , G06F2221/0755 , H04L9/0822 , H04L9/0866 , H04L2209/20 , H04L2209/603
摘要： A method, system on a chip, and computer system for generating more robust keys which utilize data occupying relatively small die areas is disclosed. Embodiments provide a convenient and effective mechanism for generating a key for use in securing data on a portable electronic device, where the key is generated from repurposed data and a relatively small amount. A multi-stage encryption algorithm may be performed to generate the key, where the first stage may include encrypting the secure data, and the second stage may include encrypting the result of a logical operation on the encrypted secure data with a unique identifier of the portable electronic device. A secret key may be used as the encryption key for each stage. The result of the second encryption stage may include the generated key which may be used to perform subsequent operations on the portable electronic device.
摘要翻译： 公开了一种用于生成利用占据相对较小管芯区域的数据的更健壮的密钥的方法，芯片上的系统和计算机系统。 实施例提供了一种用于生成用于保护便携式电子设备上的数据的密钥的方便和有效的机制，其中密钥是由重新利用的数据产生的，并且数量相对较少。 可以执行多级加密算法来生成密钥，其中第一级可以包括对安全数据进行加密，并且第二级可以包括用加密的安全数据的加密安全数据的唯一标识符加密逻辑操作的结果 电子设备。 秘密密钥可以用作每个阶段的加密密钥。 第二加密阶段的结果可以包括可用于在便携式电子设备上执行后续操作的所生成的密钥。
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公开(公告)号：US08473750B2
公开(公告)日：2013-06-25
申请号：US11304116
申请日：2005-12-14
CPC分类号： H04N21/4367 , G06F21/72 , H04N5/775 , H04N5/85 , H04N5/913 , H04N7/1675 , H04N21/4113 , H04N21/4122 , H04N21/42646 , H04N21/4325 , H04N2005/91364
摘要： A bridge is disclosed having a security engine to protect digital content at insecure interfaces of the bridge. The bridge permits cryptographic services to he offloaded from a central processing unit to the bridge. The bridge receives a clear text input from a central processing unit. The bridge encrypts the clear text input as cipher text for storage in a memory. The bridge provided the cipher text to a graphics processing unit.
摘要翻译： 公开了一种具有安全引擎以在桥的不安全接口处保护数字内容的桥。 该桥允许从中央处理单元卸载到桥上的加密服务。 桥接器从中央处理单元接收明文输入。 桥将加密明文输入作为密文用于存储在内存中。 桥将密文提供给图形处理单元。
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公开(公告)号：US07755624B1
公开(公告)日：2010-07-13
申请号：US12266820
申请日：2008-11-07
CPC分类号： G06T15/005 , G06T15/405
摘要： A processor generates Z-cull information for tiles and groups of tiles. In one embodiment the processor includes an on-chip cache to coalesce Z information for tiles to identify occluded tiles. In a coprocessor embodiment, the processor provides Z-culling information to a graphics processor.
摘要翻译： 处理器生成瓦片和瓦片组的Z-cull信息。 在一个实施例中，处理器包括片上高速缓存以合并瓦片的Z信息以识别封闭的瓦片。 在协处理器实施例中，处理器向图形处理器提供Z剔除信息。
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公开(公告)号：US07650645B1
公开(公告)日：2010-01-19
申请号：US11133956
申请日：2005-05-20
CPC分类号： G06F21/606
摘要： Circuits, methods, and apparatus that provide for trusted transactions between a device and system memory. In one exemplary embodiment of the present invention, a host processor asserts and de-asserts trust over a virtual wire. The device accesses certain data if the host processor provides a trusted instruction for it to do so. Once the device attempts to access this certain data, or perform a certain type of data access, a memory controller allows the access on the condition that the host processor previously made the trusted instruction. The device then accepts data if trust is asserted during the data transfer.
摘要翻译： 提供设备和系统存储器之间信任事务的电路，方法和设备。 在本发明的一个示例性实施例中，主机处理器通过虚拟线路断言和取消断言信任。 如果主机处理器为其提供可信指令，则设备访问某些数据。 一旦设备尝试访问该特定数据或执行某种类型的数据访问，存储器控制器允许在主处理器先前做出可信指令的条件下进行访问。 然后，如果在数据传输过程中信任被断言，则设备接受数据。
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7.发明授权Chipset support for binding and migrating hardware devices among heterogeneous processing units 有权芯片组支持在异构处理单元之间绑定和迁移硬件设备公开(公告)号：US09032101B1
公开(公告)日：2015-05-12
申请号：US12332009
申请日：2008-12-10
申请人： Michael Brian Cox , Brad W. Simeral
发明人： Michael Brian Cox , Brad W. Simeral
CPC分类号： G06F12/1081 , G06F12/0292 , G06F12/0692 , G06F2212/206
摘要： A method for providing access to hardware devices by a processor without causing conflicts with other processors included in a computer system. The method includes receiving a first address map from a first processor and a second address map from a second processor, where each address map includes memory-mapped input/output (I/O) apertures for a set of hardware devices that the processor is configured to access. The method further includes generating a global address map by combining the first address map and the second address map, receiving a first access request from the first processor and routing the first access request to a hardware device based on an address mapping included in the global address map. Advantageously, heterogeneous processors included in multi-processor system can access any hardware device included in the computer system, without modifying the processors, one or more operating systems executed by each processor, or the hardware devices.
摘要翻译： 一种用于通过处理器提供对硬件设备的访问的方法，而不引起与计算机系统中包括的其他处理器的冲突。 该方法包括从第一处理器接收第一地址映射和从第二处理器接收第二地址映射，其中每个地址映射包括处理器配置的一组硬件设备的存储器映射的输入/输出（I / O）孔径 访问。 该方法还包括通过组合第一地址映射和第二地址映射来生成全局地址映射，从第一处理器接收第一访问请求，并基于包含在全局地址中的地址映射将第一访问请求路由到硬件设备 地图。 有利地，包括在多处理器系统中的异构处理器可以访问包括在计算机系统中的任何硬件设备，而无需修改处理器，由每个处理器执行的一个或多个操作系统或硬件设备。
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8.发明授权公开(公告)号：US08943584B2
公开(公告)日：2015-01-27
申请号：US13568023
申请日：2012-08-06
申请人： Brad W. Simeral , Michael Brian Cox
发明人： Brad W. Simeral , Michael Brian Cox
CPC分类号： G06F9/45537
摘要： A method for providing an operating system access to devices, including enumerating hardware devices and virtualized devices, where resources associated with a first hardware device are divided into guest physical resources creating a software virtualized device, and multiple instances of resources associated with a second hardware device are advertised thereby creating a hardware virtualized device. First and second permission lists are generated that specify which operating systems are permitted to access the software virtualized device and the hardware virtualized device, respectively. First and second sets of virtual address maps are generated, where each set maps an address space associated with either the software virtualized device or the hardware virtualized device into an address space associated with each operating system included in the corresponding permission list. The method further includes arbitrating access requests from each of the plurality of operating systems based on the permission lists and the virtual address maps.
摘要翻译： 一种用于提供对包括枚举硬件设备和虚拟化设备的枚举的设备的操作系统访问的方法，其中与第一硬件设备相关联的资源被划分为创建软件虚拟化设备的客户物理资源以及与第二硬件设备相关联的资源的多个实例 由此创建一个硬件虚拟化设备。 生成第一和第二权限列表，其指定哪些操作系统被允许访问软件虚拟化设备和硬件虚拟化设备。 生成第一和第二组虚拟地址映射，其中每个集合将与软件虚拟化设备或硬件虚拟化设备相关联的地址空间映射到与包括在相应的许可列表中的每个操作系统相关联的地址空间中。 该方法还包括基于许可列表和虚拟地址映射来对来自多个操作系统中的每一个的访问请求进行仲裁。
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9.发明申请公开(公告)号：US20100146620A1
公开(公告)日：2010-06-10
申请号：US12330466
申请日：2008-12-08
申请人： Brad W. Simeral , Michael Brian Cox
发明人： Brad W. Simeral , Michael Brian Cox
IPC分类号： G06F21/22
CPC分类号： G06F9/45537
摘要： A method for providing an operating system access to devices, including enumerating hardware devices and virtualized devices, where resources associated with a first hardware device are divided into guest physical resources creating a software virtualized device, and multiple instances of resources associated with a second hardware device are advertised thereby creating a hardware virtualized device. First and second permission lists are generated that specify which operating systems are permitted to access the software virtualized device and the hardware virtualized device, respectively. First and second sets of virtual address maps are generated, where each set maps an address space associated with either the software virtualized device or the hardware virtualized device into an address space associated with each operating system included in the corresponding permission list. The method further includes arbitrating access requests from each of the plurality of operating systems based on the permission lists and the virtual address maps.
摘要翻译： 一种用于提供对包括枚举硬件设备和虚拟化设备的枚举的设备的操作系统访问的方法，其中与第一硬件设备相关联的资源被划分为创建软件虚拟化设备的客户物理资源以及与第二硬件设备相关联的资源的多个实例 由此创建一个硬件虚拟化设备。 生成第一和第二权限列表，其指定哪些操作系统被允许访问软件虚拟化设备和硬件虚拟化设备。 生成第一和第二组虚拟地址映射，其中每个集合将与软件虚拟化设备或硬件虚拟化设备相关联的地址空间映射到与包括在相应的许可列表中的每个操作系统相关联的地址空间中。 该方法还包括基于许可列表和虚拟地址映射来对来自多个操作系统中的每一个的访问请求进行仲裁。
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公开(公告)号：US07289125B2
公开(公告)日：2007-10-30
申请号：US10789248
申请日：2004-02-27
CPC分类号： G06F3/14 , G06F3/1438 , G06T1/20 , G06T15/005 , G09G5/363
摘要： A bridge associated with a broadcast aperture facilitates the transfer of rendering commands and data between a processor and multiple graphics devices. The bridge receives data written by the processor to the broadcast aperture and forwards it to multiple graphics devices, eliminating the need for the processor to perform duplicative(?) write operations. During system initialization, a broadcast aperture is allocated to the bridge in address space based on an aperture size value set using a system configuration utility and stored in system configuration memory. A graphics driver activates the broadcast aperture by sending unicast aperture parameters associated with the multiple graphics devices to the bridge via a bridge driver. Upon activating the broadcast aperture, multiple graphics devices can be operated in parallel to improve rendering performance. Parallel rendering techniques include split-frame, alternate frame, and combined split- and alternate frame rendering.
摘要翻译： 与广播孔径相关联的桥接器有助于在处理器和多个图形设备之间传送渲染命令和数据。 桥接器将处理器写入的数据接收到广播孔径并将其转发到多个图形设备，从而无需处理器执行重复（？）写入操作。 在系统初始化期间，基于使用系统配置实用程序设置的存储在系统配置存储器中的孔径大小值，将广播孔径分配给地址空间中的桥。 图形驱动器通过经由桥驱动器将与多个图形设备相关联的单播孔径参数发送到桥接器来激活广播孔径。 在激活广播孔径时，可以并行地操作多个图形设备以提高渲染性能。 并行渲染技术包括分割帧，备用帧以及组合分割和交替帧渲染。
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