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公开(公告)号:US09098462B1
公开(公告)日:2015-08-04
申请号:US12881392
申请日:2010-09-14
CPC分类号: G06F13/1631 , G06F9/544 , G06F12/0215 , G06F12/0284 , G06F12/109 , G06F15/163 , G06F2212/1016 , G06F2212/657
摘要: A first processing core selects a first memory address of a first memory area based on a last written buffer that identifies a last written memory address. The first memory area is a portion of a shared memory, and the first processing core has sole write access to the first memory area among a plurality of processing cores that use the shared memory. Data is written to the first memory address of the first memory area. After writing the data to the first memory address, the last written buffer is updated to designate the first memory address as the last written memory address of the first memory area. A second processing core of the plurality of processing cores is operable to access the data by accessing the last written buffer and determining, based on the last written buffer, that the data is stored at the first memory address.
摘要翻译: 第一处理核心基于识别最后写入的存储器地址的最后写入的缓冲器来选择第一存储器区域的第一存储器地址。 第一存储器区域是共享存储器的一部分,并且第一处理核心对使用共享存储器的多个处理核心中的第一存储器区域具有唯一的写入访问。 数据被写入第一存储器区域的第一存储器地址。 在将数据写入第一存储器地址之后,最后写入的缓冲器被更新为将第一存储器地址指定为第一存储器区域的最后写入的存储器地址。 多个处理核心的第二处理核心可操作以通过访问最后写入的缓冲器来访问数据,并且基于最后写入的缓冲器确定数据被存储在第一存储器地址。