公开(公告)号：US06038381A

公开(公告)日：2000-03-14

申请号：US977562

申请日：1997-11-25

申请人： Michael Munch ,  Bernd Wurth ,  Renu Mehra ,  James David Sproch

发明人： Michael Munch ,  Bernd Wurth ,  Renu Mehra ,  James David Sproch

IPC分类号： G06F17/50

CPC分类号： G06F17/5045

摘要： A computer-implemented process for determining a signal function for use in controlling the application of signal operands to a circuit-implemented function for the purpose of power reduction. The present invention receives a netlist represented as a graph data structure having nodes interconnected with signal lines. A node can have one output (single fan-out) or can have more than one output (multiple fan-outs). Termination points of the graph are identified as inputs to registers or primary outputs. From the termination points, and using a breadth-first traversal process, the present invention traverses each node of the netlist. A parent node is not processed in the breadth-first traversal until all of its child nodes have been processed. During traversal, an activation signal function is constructed for each input of a node. If the node has multiple outputs then a disjunctive Boolean expression is used, otherwise a conjunctive Boolean expression is used to determine the activation signal function. Activation signal circuitry is then added to each node if the power savings meet certain specified area and timing considerations. Selected nodes have operand isolation circuitry added thereto to implement the activation signal functions. The activation signal circuitry is used to gate the operand signal inputs to the node thereby saving power when the node's output is ignored.

摘要翻译： 用于确定信号功能的计算机实现的过程，用于控制信号操作数到电路实现的功能的应用以降低功率。 本发明接收表示为具有与信号线互连的节点的图形数据结构的网表。 一个节点可以有一个输出（单个扇出）或可以有多个输出（多个扇出）。 曲线图的终点被标识为寄存器或主输出的输入。 从终端点开始，使用宽度优先遍历处理，本发明遍历网表的每个节点。 在广度优先遍历之前不处理父节点，直到其所有子节点都被处理。 在遍历期间，为节点的每个输入构造激活信号功能。 如果节点具有多个输出，则使用分离布尔表达式，否则使用连接布尔表达式来确定激活信号函数。 如果功率节省满足某些特定的区域和时序考虑，则激活信号电路被添加到每个节点。 所选择的节点具有添加到其中的操作数隔离电路以实现激活信号功能。 激活信号电路用于将操作数信号输入选通到节点，从而在节点的输出被忽略时节省功率。

公开(公告)号：US20130132914A1

公开(公告)日：2013-05-23

申请号：US13740439

申请日：2013-01-14

申请人： James David Sproch ,  Victor Moroz ,  Xiaopeng Xu ,  Aditya Pradeep Karmarkar

发明人： James David Sproch ,  Victor Moroz ,  Xiaopeng Xu ,  Aditya Pradeep Karmarkar

IPC分类号： G06F17/50

CPC分类号： G06F17/5072 ,  G06F17/5009 ,  G06F17/5036 ,  G06F17/5068 ,  G06F17/5081 ,  G06F2217/12 ,  G06F2217/82 ,  H01L21/76898 ,  H01L21/823807 ,  H01L27/0207 ,  H01L29/7845 ,  H01L2924/0002 ,  Y02P90/265 ,  H01L2924/00

摘要： Roughly described, the invention involves ways to characterize, take account of, or take advantage of stresses introduced by TSV's near transistors. The physical relationship between the TSV and nearby transistors can be taken into account when characterizing a circuit. A layout derived without knowledge of the physical relationships between TSV and nearby transistors, can be modified to do so. A macrocell can include both a TSV and nearby transistors, and a simulation model for the macrocell which takes into account physical relationships between the transistors and the TSV. A macrocell can include both a TSV and nearby transistors, one of the transistors being rotated relative to others. An IC can also include a transistor in such proximity to a TSV as to change the carrier mobility in the channel by more than the limit previously thought to define an exclusion zone.

摘要翻译： 粗略地描述，本发明涉及表征，考虑或利用TSV近晶体管引入的应力的方法。 在表征电路时，可以考虑TSV和附近晶体管之间的物理关系。 在不了解TSV和附近晶体管之间的物理关系的情况下导出的布局可以进行修改。 宏单元可以包括TSV和附近晶体管，以及考虑到晶体管和TSV之间的物理关系的宏单元的仿真模型。 宏单元可以包括TSV和附近的晶体管，其中一个晶体管相对于其他晶体管旋转。 IC还可以包括在TSV附近的晶体管，以将通道中的载流子迁移率改变超过先前认为限定禁区的极限。

公开(公告)号：US08362622B2

公开(公告)日：2013-01-29

申请号：US12430008

申请日：2009-04-24

申请人： James David Sproch ,  Victor Moroz ,  Xiaopeng Xu ,  Aditya Pradeep Karmarkar

发明人： James David Sproch ,  Victor Moroz ,  Xiaopeng Xu ,  Aditya Pradeep Karmarkar

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： G06F17/5072 ,  G06F17/5009 ,  G06F17/5036 ,  G06F17/5068 ,  G06F17/5081 ,  G06F2217/12 ,  G06F2217/82 ,  H01L21/76898 ,  H01L21/823807 ,  H01L27/0207 ,  H01L29/7845 ,  H01L2924/0002 ,  Y02P90/265 ,  H01L2924/00

摘要： Roughly described, the invention involves ways to characterize, take account of, or take advantage of stresses introduced by TSV's near transistors. The physical relationship between the TSV and nearby transistors can be taken into account when characterizing a circuit. A layout derived without knowledge of the physical relationships between TSV and nearby transistors, can be modified to do so. A macrocell can include both a TSV and nearby transistors, and a simulation model for the macrocell which takes into account physical relationships between the transistors and the TSV. A macrocell can include both a TSV and nearby transistors, one of the transistors being rotated relative to others. An IC can also include a transistor in such proximity to a TSV as to change the carrier mobility in the channel by more than the limit previously thought to define an exclusion zone.

摘要翻译： 粗略地描述，本发明涉及表征，考虑或利用TSV近晶体管引入的应力的方法。 在表征电路时，可以考虑TSV和附近晶体管之间的物理关系。 在不了解TSV和附近晶体管之间的物理关系的情况下导出的布局可以进行修改。 宏单元可以包括TSV和附近晶体管，以及考虑到晶体管和TSV之间的物理关系的宏单元的仿真模型。 宏单元可以包括TSV和附近的晶体管，其中一个晶体管相对于其他晶体管旋转。 IC还可以包括在TSV附近的晶体管，以将通道中的载流子迁移率改变超过先前认为限定禁区的极限。

公开(公告)号：US08661387B2

公开(公告)日：2014-02-25

申请号：US13740439

申请日：2013-01-14

申请人： James David Sproch ,  Victor Moroz ,  Xiaopeng Xu ,  Aditya Pradeep Karmarkar

发明人： James David Sproch ,  Victor Moroz ,  Xiaopeng Xu ,  Aditya Pradeep Karmarkar

IPC分类号： G06F17/50

CPC分类号： G06F17/5072 ,  G06F17/5009 ,  G06F17/5036 ,  G06F17/5068 ,  G06F17/5081 ,  G06F2217/12 ,  G06F2217/82 ,  H01L21/76898 ,  H01L21/823807 ,  H01L27/0207 ,  H01L29/7845 ,  H01L2924/0002 ,  Y02P90/265 ,  H01L2924/00

摘要： Roughly described, the invention involves ways to characterize, take account of, or take advantage of stresses introduced by TSV's near transistors. The physical relationship between the TSV and nearby transistors can be taken into account when characterizing a circuit. A layout derived without knowledge of the physical relationships between TSV and nearby transistors, can be modified to do so. A macrocell can include both a TSV and nearby transistors, and a simulation model for the macrocell which takes into account physical relationships between the transistors and the TSV. A macrocell can include both a TSV and nearby transistors, one of the transistors being rotated relative to others. An IC can also include a transistor in such proximity to a TSV as to change the carrier mobility in the channel by more than the limit previously thought to define an exclusion zone.

摘要翻译： 粗略地描述，本发明涉及表征，考虑或利用TSV近晶体管引入的应力的方法。 在表征电路时，可以考虑TSV和附近晶体管之间的物理关系。 在不了解TSV和附近晶体管之间的物理关系的情况下导出的布局可以进行修改。 宏单元可以包括TSV和附近晶体管，以及考虑到晶体管和TSV之间的物理关系的宏单元的仿真模型。 宏单元可以包括TSV和附近的晶体管，其中一个晶体管相对于其他晶体管旋转。 IC还可以包括在TSV附近的晶体管，以将通道中的载流子迁移率改变超过先前认为限定禁区的极限。