摘要:
The system of the invention is used in a communication controller comprising a central control unit connected to at least one line adapter through a bus, wherein the line adapter may not be attached through its line interface to communication lines working at a speed higher than v, this mechanism allowing the adapter to be connected to one communication line onto which information is transported in frames at a high speed HS which is higher than v. It comprises a receive mechanism and a transmit mechanism building a bypass booster 1. The receive mechanism constructs from the received bit stream on high speed line 6, a short frame only comprising the heading portions of the frames, said short frame being handled by the line scanner 2 and the complete frame being handled separatly in bypass booster 1. The transmit mechanism simulates the transmission from the system bus 5 of a short frame which is handled by the line scanner and the complete frame is handled in the bypass booster, from which the complete frame is sent on the high speed line 6.
摘要:
Mechanism for allowing data and packetized non coded information NCI such as packetized voice or images, to be exchanged between workstations connected to nodes of a communication network. The workstations arrange the bit stream to be sent into a format of regularly occurring time slots separated by flags. The data only containing time slots begin with a first flag (F2), the NCI only containing and NCI and data containing time slots begin with a second flag (F1) and inside these slots, flag F2 separates the NCI and data portions.The route between two workstations is established by a data session using the node resources. Once a route is established, the NCI portions of the bit stream are switched using high speed bus 26 and the data portions are routed using the normal data paths.
摘要:
Serial link adapter to be used in a communication controller comprising data handling means (DHM), said adapter allowing the communication controller to be attached to a multiplex serial link carrying data and non coded information bits in dedicated slots.In line adapter LA1 receiving means RCV1 are connected to serial link carrying data and non coded information slots. The receiving means comprises a routing arrangement for sending the data slot bits to the data handling means of the controller and the non coded information slot bits a high speed bus HSB1. Transmitting means Xmit1 are connected to high speed bus HSB2 and to the data handling means and comprises means for sending the data and non coded information slot bits in dedicated slots on the serial multiplex link MPX-T. Line adapter LA2 comprises means which are similar to the receiving and transmitting means in adapter LA1 and may be connected to the private branch exchange located in the same site as the communication controller.
摘要:
A multiplex interface for interconnecting the line scanning means (1) of a communication controller to user lines via transmit and receive synchronous multiplex links. Both data and control bits are exchanged in synchronous frames wherein at least two slots are assigned to each user line, the structure of the two slots is identical for all types of user lines and includes an n-bit data slot having a variable number x of valid bits depending upon the line speed of the user line assigned to the data slot and indicated by a variable delimiter pattern comprising a first delimiting bit set at a first binary value (1) adjacent to the data bits and (n-x-1) bits set at the second binary value (0) adjacent to said first delimiting bit, and an n-bit control slot having a first bit used as a global validation bit in case the data slot comprises n valid bits (x=n), this bit being set at the first binary value (1) when the data slot comprises n valid bits and at the second binary value (0) if it comprises less than n valid bits, and the n-1 following bits are used for exchanging control information.
摘要:
A multiplex interface for interconnecting the line scanning means (1) of a communication controller to user lines via transmit and receive synchronous multiplex links. Both data and control bits are exchanged in synchronous frames wherein at least two slots are assigned to each user line, the structure of the two slots is identical for all types of user lines and includes an n-bit data slot having a variable number x of valid bits depending upon the line speed of the user line assigned to the data slot and indicated by a variable delimiter pattern comprising a first delimiting bit set at a first binary value (1) adjacent to the data bits and (n--x--1) bits set at the second binary value (0) adjacent to said first delimiting bit, and an n-bit control slot having a first bit used as a global validation bit in case the data slot comprises n valid bits (x.dbd.n), this bit being set at the first binary value (1) when the data slot comprises n valid bits and at the second binary value (0) if it comprises less than n valid bits, and the n--following bits are used for exchanging control information.