公开(公告)号：US20060177064A1

公开(公告)日：2006-08-10

申请号：US11053273

申请日：2005-02-07

申请人： Micky Holtzman ,  Baruch Cohen ,  Ron Barzilai

发明人： Micky Holtzman ,  Baruch Cohen ,  Ron Barzilai

IPC分类号： H04L9/00

CPC分类号： G06F21/77 ,  G06F2221/2105 ,  G06F2221/2143 ,  H04L9/0897 ,  H04L2209/12 ,  H04L2209/26

摘要： A secure memory card with encryption capabilities comprises various life cycle states that allow for testing of the hardware and software of the card in certain of the states. The testing mechanisms are disabled in certain other of the states thus closing potential back doors to secure data and cryptographic keys. Controlled availability and generation of the keys required for encryption and decryption of data is such that even if back doors are accessed that previously encrypted data is impossible to decrypt and thus worthless even if a back door is found and maliciously pried open.

公开(公告)号：US20060176068A1

公开(公告)日：2006-08-10

申请号：US11317390

申请日：2005-12-22

申请人： Micky Holtzman ,  Baruch Cohen ,  Ron Barzilai ,  Hagai Bar-El ,  David Deitcher

发明人： Micky Holtzman ,  Baruch Cohen ,  Ron Barzilai ,  Hagai Bar-El ,  David Deitcher

IPC分类号： G01R31/26

CPC分类号： G11C29/1201 ,  G06F21/77 ,  G06F2221/2105 ,  G06F2221/2143 ,  G11C5/04

摘要： A secure memory card with encryption capabilities comprises various life cycle states that allow for testing of the hardware and software of the card in certain of the states. The testing mechanisms are disabled in certain other of the states thus closing potential back doors to secure data and cryptographic keys. Controlled availability and generation of the keys required for encryption and decryption of data is such that even if back doors are accessed that previously encrypted data is impossible to decrypt and thus worthless even if a back door is found and maliciously pried open.

摘要翻译： 具有加密功能的安全存储卡包括允许在某些状态下测试卡的硬件和软件的各种生命周期状态。 在某些其他状态下，测试机制被禁用，从而关闭潜在的后门以保护数据和加密密钥。 受控的可用性和数据加密和解密所需的密钥的生成使得即使后门被访问，即使发现后门被恶意撬开，以前加密的数据也不可能解密，因此也是无价值的。

公开(公告)号：US20070188183A1

公开(公告)日：2007-08-16

申请号：US11317862

申请日：2005-12-22

申请人： Micky Holtzman ,  Baruch Cohen ,  Ron Barzilai ,  Hagai Bar-El ,  David Deitcher

发明人： Micky Holtzman ,  Baruch Cohen ,  Ron Barzilai ,  Hagai Bar-El ,  David Deitcher

IPC分类号： G01R31/02

CPC分类号： G11C29/08 ,  G06F21/72 ,  G06F21/75 ,  G06F21/77 ,  G11C5/04

摘要： A secure memory card with encryption capabilities comprises various life cycle states that allow for testing of the hardware and software of the card in certain of the states. The testing mechanisms are disabled in certain other of the states thus closing potential back doors to secure data and cryptographic keys. Controlled availability and generation of the keys required for encryption and decryption of data is such that even if back doors are accessed that previously encrypted data is impossible to decrypt and thus worthless even if a back door is found and maliciously pried open.

摘要翻译： 具有加密功能的安全存储卡包括允许在某些状态下测试卡的硬件和软件的各种生命周期状态。 在某些其他状态下，测试机制被禁用，从而关闭潜在的后门以保护数据和加密密钥。 受控的可用性和数据加密和解密所需的密钥的生成使得即使后门被访问，即使发现后门被恶意撬开，以前加密的数据也不可能解密，因此也是无价值的。

公开(公告)号：US20070180539A1

公开(公告)日：2007-08-02

申请号：US11314032

申请日：2005-12-20

申请人： Michael Holtzman ,  Baruch Cohen ,  David Deitcher ,  Hagai Bar-El ,  Aviram Yeruchami

发明人： Michael Holtzman ,  Baruch Cohen ,  David Deitcher ,  Hagai Bar-El ,  Aviram Yeruchami

IPC分类号： G06F11/00

CPC分类号： G06F21/79 ,  G06F21/72 ,  G06F21/85 ,  H04L9/0643 ,  H04L9/3236 ,  H04L2209/38

摘要： The throughput of the memory system is improved where data in a data stream is cryptographically processed by a circuit without involving intimately any controller. The data stream is preferably controlled so that it has a selected data source among a plurality of sources and a selected destination among a plurality of destinations, all without involving the controller. The cryptographic circuit may preferably be configured to enable the processing of multiple pages, selection of one or more cryptographic algorithms among a plurality of algorithms to encryption and/or decryption without involving a controller, and to process data cryptographically in multiple successive stages without involvement of the controller. For a memory system cryptographically processing data from multiple data streams in an interleaved manner, when a session is interrupted, security configuration information may be lost so that it may become impossible to continue the process when the session is resumed. To retain the security configuration information, the controller preferably causes the security configuration information for the session to be stored before the interruption so that it is retrievable after the interruption.

摘要翻译： 在数据流中的数据由电路进行密码处理而不涉及任何控制器的情况下，存储器系统的吞吐量得到改善。 优选地控制数据流，使得其具有多个源中的选择的数据源和多个目的地中的所选择的目的地，全部不涉及控制器。 优选地，加密电路可被配置为能够处理多个页面，在多个算法之间选择一个或多个加密算法以加密和/或解密而不涉及控制器，并且在多个连续阶段以密码方式处理数据，而不涉及 控制器。 对于以交织方式从多个数据流加密处理数据的存储器系统，当会话被中断时，可能丢失安全配置信息，从而当会话被恢复时可能变得不可能继续该过程。 为了保持安全配置信息，控制器优选地在中断之前存储会话的安全配置信息，以便在中断之后可以检索会话的安全配置信息。

公开(公告)号：US20060242429A1

公开(公告)日：2006-10-26

申请号：US11314030

申请日：2005-12-20

申请人： Michael Holtzman ,  Baruch Cohen ,  David Deitcher ,  Hagai Bar-EL ,  Aviram Yeruchami

发明人： Michael Holtzman ,  Baruch Cohen ,  David Deitcher ,  Hagai Bar-EL ,  Aviram Yeruchami

IPC分类号： H04L9/00 ,  G06F12/14 ,  H04L9/32 ,  G06F11/30

CPC分类号： G06F21/79 ,  G06F21/72 ,  G06F21/85 ,  H04L9/0643 ,  H04L9/3236 ,  H04L2209/38

摘要： The throughput of the memory system is improved where data in a data stream is cryptographically processed by a circuit without involving intimately any controller. The data stream is preferably controlled so that it has a selected data source among a plurality of sources and a selected destination among a plurality of destinations, all without involving the controller. The cryptographic circuit may preferably be configured to enable the processing of multiple pages, selection of one or more cryptographic algorithms among a plurality of algorithms to encryption and/or decryption without involving a controller, and to process data cryptographically in multiple successive stages without involvement of the controller. For a memory system cryptographically processing data from multiple data streams in an interleaved manner, when a session is interrupted, security configuration information may be lost so that it may become impossible to continue the process when the session is resumed. To retain the security configuration information, the controller preferably causes the security configuration information for the session to be stored before the interruption so that it is retrievable after the interruption.

摘要翻译： 在数据流中的数据由电路进行密码处理而不涉及任何控制器的情况下，存储器系统的吞吐量得到改善。 优选地控制数据流，使得其具有多个源中的选择的数据源和多个目的地中的所选择的目的地，全部不涉及控制器。 优选地，加密电路可被配置为能够处理多个页面，在多个算法之间选择一个或多个加密算法以加密和/或解密而不涉及控制器，并且在多个连续阶段以密码方式处理数据，而不涉及 控制器。 对于以交织方式从多个数据流加密处理数据的存储器系统，当会话被中断时，可能丢失安全配置信息，从而当会话被恢复时可能变得不可能继续该过程。 为了保持安全配置信息，控制器优选地在中断之前存储会话的安全配置信息，以便在中断之后可以检索会话的安全配置信息。

公开(公告)号：US20060239450A1

公开(公告)日：2006-10-26

申请号：US11313447

申请日：2005-12-20

申请人： Michael Holtzman ,  Baruch Cohen ,  Muhammed Islam ,  Matthew Davidson

发明人： Michael Holtzman ,  Baruch Cohen ,  Muhammed Islam ,  Matthew Davidson

IPC分类号： H04L9/28

CPC分类号： G06F11/1068 ,  H04L9/065 ,  H04L2209/34

摘要： The throughput of the memory system is improved where error correction of data in a data stream is cryptographically processed with minimal involvement of any controller. To perform error correction when data from the memory cells are read, the bit errors in the data in the data stream passing between the cells and the cryptographic circuit are corrected prior to any cryptographic process performed by the circuit. Preferably the error correction occurs in one or more buffers employed to buffer the data between the cryptographic circuit and the memory where latency is reduced by using multiple buffers.

摘要翻译： 改进了存储器系统的吞吐量，其中数据流中的数据的错误校正被密码处理，并且任何控制器的参与程度最小。 为了在从存储器单元读取数据时执行纠错，在由电路执行的任何密码处理之前，校正在单元和密码电路之间通过的数据流中的数据位的错误。 优选地，误差校正发生在用于缓冲加密电路和存储器之间的数据的一个或多个缓冲器中，其中通过使用多个缓冲器来降低延迟。

公开(公告)号：US20060239449A1

公开(公告)日：2006-10-26

申请号：US11313428

申请日：2005-12-20

申请人： Michael Holtzman ,  Baruch Cohen ,  Muhammed Islam ,  Matthew Davidson

发明人： Michael Holtzman ,  Baruch Cohen ,  Muhammed Islam ,  Matthew Davidson

IPC分类号： H04L9/28

CPC分类号： H04L9/065 ,  H04L2209/34

摘要： The throughput of the memory system is improved where error correction of data in a data stream is cryptographically processed with minimal involvement of any controller. To perform error correction when data from the memory cells are read, the bit errors in the data in the data stream passing between the cells and the cryptographic circuit are corrected prior to any cryptographic process performed by the circuit. Preferably the error correction occurs in one or more buffers employed to buffer the data between the cryptographic circuit and the memory where latency is reduced by using multiple buffers.

摘要翻译： 改进了存储器系统的吞吐量，其中数据流中的数据的错误校正被密码处理，并且任何控制器的参与程度最小。 为了在从存储器单元读取数据时执行纠错，在由电路执行的任何密码处理之前，校正在单元和密码电路之间通过的数据流中的数据位的错误。 优选地，误差校正发生在用于缓冲加密电路和存储器之间的数据的一个或多个缓冲器中，其中通过使用多个缓冲器来降低延迟。