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公开(公告)号:US11513577B2
公开(公告)日:2022-11-29
申请号:US17301094
申请日:2021-03-24
Applicant: Microchip Technology Incorporated
Inventor: Eric Ching , Venkatraman Iyer
IPC: G06F1/26 , G06F1/3203 , G06F9/4401 , G06F13/20 , G06F1/3215
Abstract: Disclosed are systems, methods, and devices for communicating a source of a 10SPE wake. Such a communication may be performed over a low-pin count hardware interface of a 10SPE physical layer (PHY) module having a split arrangement. A controller side of a 10SPE PHY may perform a local or remote 10SPE wake forward in response to a communicated source of a wake. Also disclosed is a digital interface for operatively coupling a PHY controller to PHY transceiver over a low-pin count connection, where the digital interface includes circuitry for checking the integrity of circuitry of the digital interface.
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公开(公告)号:US20230091738A1
公开(公告)日:2023-03-23
申请号:US18058650
申请日:2022-11-23
Applicant: Microchip Technology Incorporated
Inventor: Eric Ching , Venkatraman Iyer
IPC: G06F1/3203 , G06F9/4401 , G06F13/20
Abstract: One or more examples relate, generally, to an apparatus. Such an apparatus includes a digital interface, a wake detect logic, and a power management connection. The digital interface may define a physical layer transceiver side of a connection between a physical layer transceiver and a physical layer controller, respectively of a 10SPE physical layer. The wake detect logic may communicate a source of detected wake from the physical layer transceiver to the physical layer controller via the digital interface. The power management connection may operatively couple to an enable connection of a switched voltage regulator.
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公开(公告)号:US12093103B2
公开(公告)日:2024-09-17
申请号:US18058650
申请日:2022-11-23
Applicant: Microchip Technology Incorporated
Inventor: Eric Ching , Venkatraman Iyer
IPC: G06F1/00 , G06F1/3203 , G06F9/4401 , G06F13/20 , G06F1/3209 , G06F1/3215
CPC classification number: G06F1/3203 , G06F9/4418 , G06F13/20 , G06F1/3209 , G06F1/3215
Abstract: One or more examples relate, generally, to an apparatus. Such an apparatus includes a digital interface, a wake detect logic, and a power management connection. The digital interface may define a physical layer transceiver side of a connection between a physical layer transceiver and a physical layer controller, respectively of a 10SPE physical layer. The wake detect logic may communicate a source of detected wake from the physical layer transceiver to the physical layer controller via the digital interface. The power management connection may operatively couple to an enable connection of a switched voltage regulator.
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公开(公告)号:US20210303050A1
公开(公告)日:2021-09-30
申请号:US17301094
申请日:2021-03-24
Applicant: Microchip Technology Incorporated
Inventor: Eric Ching , Venkatraman Iyer
IPC: G06F1/3203 , G06F13/20 , G06F9/4401
Abstract: Disclosed are systems, methods, and devices for communicating a source of a 10SPE wake. Such a communication may be performed over a low-pin count hardware interface of a 10SPE physical layer (PHY) module having a split arrangement. A controller side of a 10SPE PHY may perform a local or remote 10SPE wake forward in response to a communicated source of a wake. Also disclosed is a digital interface for operatively coupling a PHY controller to PHY transceiver over a low-pin count connection, where the digital interface includes circuitry for checking the integrity of circuitry of the digital interface.
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