公开(公告)号：US20240078153A1

公开(公告)日：2024-03-07

申请号：US18313670

申请日：2023-05-08

Applicant: Micron Technology, Inc.

Inventor： Aaron Jannusch ,  Brett K. Dodds ,  Debra M. Bell ,  Joshua E. Alzheimer ,  Scott E. Smith

IPC: G06F11/10

CPC classification number: G06F11/1044 ,  G06F11/102 ,  G06F11/1032

Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which a host device may access a group of memory cells (e.g., portion of an array configurable to store ECC parity bits) otherwise reserved for ECC functionality of a memory device. The memory device may include a register to indicate whether its ECC functionality is enabled or disabled. When the register indicates the ECC functionality is disabled, the memory device may increase a storage capacity available to the host device by making the group of memory cells available for user-accessible data. Additionally or alternatively, the memory device may store metadata associated with various operational aspects of the memory device in the group of memory cells. Moreover, the memory device may modify a burst length to accommodate additional information to be stored in or read from the group of memory cells.

公开(公告)号：US11687403B2

公开(公告)日：2023-06-27

申请号：US17350099

申请日：2021-06-17

Applicant: Micron Technology, Inc.

Inventor： Aaron Jannusch ,  Brett K. Dodds ,  Debra M. Bell ,  Joshua E. Alzheimer ,  Scott E. Smith

IPC: G11C29/00 ,  G06F11/10

CPC classification number: G06F11/1044 ,  G06F11/102 ,  G06F11/1032

Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which a host device may access a group of memory cells (e.g., portion of an array configurable to store ECC parity bits) otherwise reserved for ECC functionality of a memory device. The memory device may include a register to indicate whether its ECC functionality is enabled or disabled. When the register indicates the ECC functionality is disabled, the memory device may increase a storage capacity available to the host device by making the group of memory cells available for user-accessible data. Additionally or alternatively, the memory device may store metadata associated with various operational aspects of the memory device in the group of memory cells. Moreover, the memory device may modify a burst length to accommodate additional information to be stored in or read from the group of memory cells.

公开(公告)号：US20240070007A1

公开(公告)日：2024-02-29

申请号：US18223465

申请日：2023-07-18

Applicant: Micron Technology, Inc.

Inventor： Aaron Jannusch ,  Mow Yiak Goh ,  Robin K. Mitra

IPC: G06F11/07

CPC classification number: G06F11/0772

Abstract: Memory with fail indicators, and associated systems, devices, and methods are disclosed herein. In one embodiment, a system includes a plurality of memory systems and a host device. At least one of the memory systems includes a fail indicator connected to the host device via a side channel of the system. The host device is configured to detect an occurrence of a failure on the at least one memory system and to initiate activation of the fail indicator. The side channel can be an I2C or I3C side channel. The fail indicator, when activated, can provide a visual indication of the failure. For example, the fail indicator can include an LED that can be activated to emit light and provide an indication of the failure. A color of the light can correspond to a type, occurrence, or location of the failure on the at least one memory system.

公开(公告)号：US20210311822A1

公开(公告)日：2021-10-07

申请号：US17350099

申请日：2021-06-17

Applicant: Micron Technology, Inc.

Inventor： Aaron Jannusch ,  Brett K. Dodds ,  Debra M. Bell ,  Joshua E. Alzheimer ,  Scott E. Smith

IPC: G06F11/10

Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which a host device may access a group of memory cells (e.g., portion of an array configurable to store ECC parity bits) otherwise reserved for ECC functionality of a memory device. The memory device may include a register to indicate whether its ECC functionality is enabled or disabled. When the register indicates the ECC functionality is disabled, the memory device may increase a storage capacity available to the host device by making the group of memory cells available for user-accessible data. Additionally or alternatively, the memory device may store metadata associated with various operational aspects of the memory device in the group of memory cells. Moreover, the memory device may modify a burst length to accommodate additional information to be stored in or read from the group of memory cells.

公开(公告)号：US11042436B2

公开(公告)日：2021-06-22

申请号：US16554913

申请日：2019-08-29

Applicant: Micron Technology, Inc.

Inventor： Aaron Jannusch ,  Brett K. Dodds ,  Debra M. Bell ,  Joshua E. Alzheimer ,  Scott E. Smith

IPC: G11C29/00 ,  G06F11/10

Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which a host device may access a group of memory cells (e.g., portion of an array configurable to store ECC parity bits) otherwise reserved for ECC functionality of a memory device. The memory device may include a register to indicate whether its ECC functionality is enabled or disabled. When the register indicates the ECC functionality is disabled, the memory device may increase a storage capacity available to the host device by making the group of memory cells available for user-accessible data. Additionally or alternatively, the memory device may store metadata associated with various operational aspects of the memory device in the group of memory cells. Moreover, the memory device may modify a burst length to accommodate additional information to be stored in or read from the group of memory cells.

公开(公告)号：US20210064460A1

公开(公告)日：2021-03-04

申请号：US16554913

申请日：2019-08-29

Applicant: Micron Technology, Inc.

Inventor： Aaron Jannusch ,  Brett K. Dodds ,  Debra M. Bell ,  Joshua M. Alzheimer ,  Scott E. Smith

IPC: G06F11/10

Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which a host device may access a group of memory cells (e.g., portion of an array configurable to store ECC parity bits) otherwise reserved for ECC functionality of a memory device. The memory device may include a register to indicate whether its ECC functionality is enabled or disabled. When the register indicates the ECC functionality is disabled, the memory device may increase a storage capacity available to the host device by making the group of memory cells available for user-accessible data. Additionally or alternatively, the memory device may store metadata associated with various operational aspects of the memory device in the group of memory cells. Moreover, the memory device may modify a burst length to accommodate additional information to be stored in or read from the group of memory cells.