公开(公告)号：US11916024B2

公开(公告)日：2024-02-27

申请号：US17447618

申请日：2021-09-14

Applicant: Micron Technology, Inc.

Inventor： Rohit Kothari ,  Adam L Olson ,  John D. Hopkins ,  Jeslin J. Wu

IPC: H01L23/00 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/762

CPC classification number: H01L23/562 ,  H01L21/31053 ,  H01L21/31144 ,  H01L21/76224

Abstract: A method of forming a semiconductor device comprising forming a patterned resist over a stack comprising at least one material and removing a portion of the stack exposed through the patterned resist to form a stack opening. A portion of the patterned resist is laterally removed to form a trimmed resist and an additional portion of the stack exposed through the trimmed resist is removed to form steps in sidewalls of the stack. A dielectric material is formed between the sidewalls of the stack to substantially completely fill the stack opening, and the dielectric material is planarized. Additional methods are disclosed, as well as semiconductor devices.