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公开(公告)号:US12051484B2
公开(公告)日:2024-07-30
申请号:US17654108
申请日:2022-03-09
Applicant: Micron Technology, Inc.
Inventor: Andrea D'alessandro , Violante Moschiano , Giacomo Donati , Luigi Marchese
Abstract: A microelectronic device comprises a microelectronic device structure comprising a section comprising page buffers, and an additional section horizontally neighboring the section and comprising page buffer drivers and a timing delay chain coupled to the page buffer drivers. Each of the page buffer drivers is coupled to different group of the page buffers than each other of the page buffer drivers. The timing delay chain comprises timing delay circuits coupled in series with one another. Each of the timing delay circuits is configured to adjustably delay propagation of a control signal therethrough. Memory devices, methods of operating memory devices, and electronic systems are also described.
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公开(公告)号:US20240386929A1
公开(公告)日:2024-11-21
申请号:US18786234
申请日:2024-07-26
Applicant: Micron Technology, Inc.
Inventor: Andrea D'alessandro , Violante Moschiano , Giacomo Donati , Luigi Marchese
Abstract: A microelectronic device comprises a microelectronic device structure comprising a section comprising page buffers, and an additional section horizontally neighboring the section and comprising page buffer drivers and a timing delay chain coupled to the page buffer drivers. Each of the page buffer drivers is coupled to different group of the page buffers than each other of the page buffer drivers. The timing delay chain comprises timing delay circuits coupled in series with one another. Each of the timing delay circuits is configured to adjustably delay propagation of a control signal therethrough. Memory devices, methods of operating memory devices, and electronic systems are also described.
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公开(公告)号:US20230019022A1
公开(公告)日:2023-01-19
申请号:US17654108
申请日:2022-03-09
Applicant: Micron Technology, Inc.
Inventor: Andrea D'alessandro , Violante Moschiano , Giacomo Donati , Luigi Marchese
Abstract: A microelectronic device comprises a microelectronic device structure comprising a section comprising page buffers, and an additional section horizontally neighboring the section and comprising page buffer drivers and a timing delay chain coupled to the page buffer drivers. Each of the page buffer drivers is coupled to different group of the page buffers than each other of the page buffer drivers. The timing delay chain comprises timing delay circuits coupled in series with one another. Each of the timing delay circuits is configured to adjustably delay propagation of a control signal therethrough. Memory devices, methods of operating memory devices, and electronic systems are also described.
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