公开(公告)号：US20220374370A1

公开(公告)日：2022-11-24

申请号：US17880226

申请日：2022-08-03

Applicant: Micron Technology, Inc.

Inventor： Guan Wang ,  Ali Feiz Zarrin Ghalam ,  Chin-Yu Chen ,  Jongin Kim

IPC: G06F13/16 ,  H03K3/017 ,  G11C16/32

Abstract: An electrical circuit device includes a signal bus comprising a plurality of parallel signal paths and a calibration circuit, operatively coupled with the signal bus. The calibration circuit can perform operations including determining a representative duty cycle for a plurality of signals transferred via the plurality of parallel signal paths, the plurality of signals comprising a plurality of duty cycles and comparing the representative duty cycle for the plurality of signals transferred via the plurality of parallel signal paths to a reference value to determine a comparison result. The calibration circuit can perform further operations including adjusting, based on the comparison result, a trim value associated with the plurality of duty cycles of the plurality of signals to compensate for distortion in the plurality of duty cycles and calibrating the plurality of duty cycles of the plurality of signals using the adjusted trim value.

公开(公告)号：US11442877B2

公开(公告)日：2022-09-13

申请号：US16949510

申请日：2020-10-30

Applicant: Micron Technology, Inc.

Inventor： Guan Wang ,  Ali Feiz Zarrin Ghalam ,  Chin-Yu Chen ,  Jongin Kim

IPC: G06F13/36 ,  G06F13/16 ,  H03K3/017 ,  G11C16/32 ,  G11C16/04

Abstract: An electrical circuit device includes a signal bus comprising a plurality of parallel signal paths and a calibration circuit, operatively coupled with the signal bus. The calibration circuit can perform operations including determining a representative duty cycle for a plurality of signals transferred via the plurality of parallel signal paths, the plurality of signals comprising a plurality of duty cycles and comparing the representative duty cycle for the plurality of signals transferred via the plurality of parallel signal paths to a reference value to determine a comparison result. The calibration circuit can perform further operations including adjusting, based on the comparison result, a trim value associated with the plurality of duty cycles of the plurality of signals to compensate for distortion in the plurality of duty cycles and calibrating the plurality of duty cycles of the plurality of signals using the adjusted trim value.

公开(公告)号：US11768782B2

公开(公告)日：2023-09-26

申请号：US17880226

申请日：2022-08-03

Applicant: Micron Technology, Inc.

Inventor： Guan Wang ,  Ali Feiz Zarrin Ghalam ,  Chin-Yu Chen ,  Jongin Kim

IPC: G06F13/16 ,  G11C16/32 ,  H03K3/017 ,  G11C29/02 ,  G11C29/12 ,  G11C29/16 ,  G11C7/22 ,  H03K5/156 ,  G11C16/04

CPC classification number: G06F13/1668 ,  G11C16/32 ,  H03K3/017 ,  G11C16/0483

Abstract: An electrical circuit device includes a signal bus comprising a plurality of parallel signal paths and a calibration circuit, operatively coupled with the signal bus. The calibration circuit can perform operations including determining a representative duty cycle for a plurality of signals transferred via the plurality of parallel signal paths, the plurality of signals comprising a plurality of duty cycles and comparing the representative duty cycle for the plurality of signals transferred via the plurality of parallel signal paths to a reference value to determine a comparison result. The calibration circuit can perform further operations including adjusting, based on the comparison result, a trim value associated with the plurality of duty cycles of the plurality of signals to compensate for distortion in the plurality of duty cycles and calibrating the plurality of duty cycles of the plurality of signals using the adjusted trim value.

公开(公告)号：US20220138120A1

公开(公告)日：2022-05-05

申请号：US16949510

申请日：2020-10-30

Applicant: Micron Technology, Inc.

Inventor： Guan Wang ,  Ali Feiz Zarrin Ghalam ,  Chin-Yu Chen ,  Jongin Kim

IPC: G06F13/16 ,  G11C16/32 ,  H03K3/017

Abstract: An electrical circuit device includes a signal bus comprising a plurality of parallel signal paths and a calibration circuit, operatively coupled with the signal bus. The calibration circuit can perform operations including determining a representative duty cycle for a plurality of signals transferred via the plurality of parallel signal paths, the plurality of signals comprising a plurality of duty cycles and comparing the representative duty cycle for the plurality of signals transferred via the plurality of parallel signal paths to a reference value to determine a comparison result. The calibration circuit can perform further operations including adjusting, based on the comparison result, a trim value associated with the plurality of duty cycles of the plurality of signals to compensate for distortion in the plurality of duty cycles and calibrating the plurality of duty cycles of the plurality of signals using the adjusted trim value.