公开(公告)号：US20230393976A1

公开(公告)日：2023-12-07

申请号：US17830047

申请日：2022-06-01

Applicant: Micron Technology, Inc.

Inventor： Xiangyu Tang ,  David Ebsen ,  Ying Huang ,  Sundararajan Sankaranarayanan

IPC: G06F12/02 ,  G06F3/06

CPC classification number: G06F12/0253 ,  G06F3/0652 ,  G06F3/0604 ,  G06F3/0679

Abstract: A subset of blocks from a set of blocks of a memory device are identified based on a valid data count constraint. A first block from the subset of blocks is selected based on a valid data count of the first block. A second block from the subset of blocks is selected based on a data temperature of the second block. A comparison of the first block and the second block is performed in accordance with one or more comparison criterion. The first block or the second block is selected as a garbage collection source block based on the comparison. Garbage collection is performed at the garbage collection source block.

公开(公告)号：US20250028600A1

公开(公告)日：2025-01-23

申请号：US18778369

申请日：2024-07-19

Applicant: Micron Technology, Inc.

Inventor： Brent Carl Byron ,  Kevin R. Brandt ,  Sampath Ratnam ,  David Ebsen ,  Daniel J. Hubbard

IPC: G06F11/10

Abstract: Aspects of the present disclosure configure a memory sub-system controller to allow a host to configure data storage policies on the memory sub-system. The controller receives, from a host, a data storage policy instruction, the data storage policy instruction defining how data is stored on a set of memory components. The controller updates configuration information for the memory sub-system based on the data storage policy instruction received from the host and controls storage of data to the set of memory components based on the updated configuration information.

公开(公告)号：US20250028479A1

公开(公告)日：2025-01-23

申请号：US18776991

申请日：2024-07-18

Applicant: Micron Technology, Inc.

Inventor： David Ebsen ,  Daniel J. Hubbard ,  Kevin R. Brandt ,  Sampath Ratnam ,  Brent Carl Byron

IPC: G06F3/06

Abstract: Aspects of the present disclosure configure a memory sub-system controller to inform a host about write amplification penalty for host invalidations. The controller generates a virtual memory group comprising a portion of a memory component of a set of memory components. The controller computes a write amplification penalty associated with invalidating data associated with the virtual memory group. The controller communicates, to a host, information about the write amplification penalty associated with invalidating data associated with the virtual memory group. The controller receives, from the host, a request to invalidate data associated with the virtual memory group, the request being generated by the host based on the write amplification penalty.

公开(公告)号：US20250053329A1

公开(公告)日：2025-02-13

申请号：US18786812

申请日：2024-07-29

Applicant: Micron Technology, Inc.

Inventor： Sampath Ratnam ,  Daniel J. Hubbard ,  Kevin R. Brandt ,  David Ebsen ,  Brent Carl Byron

IPC: G06F3/06

Abstract: Aspects of the present disclosure configure a memory sub-system controller to receive information from a host about invalidated memory addresses. The controller receives, from a host, data identifying a set of storage locations associated with invalidated data stored in a set of memory components and, in response to receiving the data, performs staging activity for the invalidated data stored in the set of storage locations. The controller receives, from the host, a trim command for one or more storage locations in the set of storage locations and performs trim operations for the one or more storage locations for which the staging activity has already been performed.

公开(公告)号：US20250036303A1

公开(公告)日：2025-01-30

申请号：US18784167

申请日：2024-07-25

Applicant: Micron Technology, Inc.

Inventor： Kevin R. Brandt ,  Sampath Ratnam ,  David Ebsen ,  Brent Carl Byron ,  Daniel J. Hubbard

IPC: G06F3/06

Abstract: Aspects of the present disclosure configure a memory sub-system controller to allow a host to control storage on the memory sub-system based on endurance of memory components. The controller groups the set of memory components into a plurality of categories representing different endurance levels of the set of memory components and communicates, to a host, information about the plurality of categories. The controller receives, from the host, a request to program data into an individual memory component of the set of memory components, the request being generated by the host based on a type of the data and an individual category associated with the individual memory component.

公开(公告)号：US20240289218A1

公开(公告)日：2024-08-29

申请号：US18586048

申请日：2024-02-23

Applicant: Micron Technology, Inc.

Inventor： David Ebsen ,  Kishore Kumar Muchherla ,  James Fitzpatrick ,  Dung V. Nguyen ,  Kevin R. Brandt ,  Vikas Rana ,  William Richard Akin

IPC: G06F11/10 ,  G06F13/16

CPC classification number: G06F11/1068 ,  G06F11/1004 ,  G06F13/1673

Abstract: Data is read from a set of memory cells of a memory device to a buffer of the memory device. One or more bits in error in the data stored by the buffer are corrected by a decoder of the memory device. The decoder corrects the one or more bits in error by decoding the data stored by the buffer. The decoding of the data results in corrected data. An encoder of the memory device encodes the corrected data and the encoded corrected data is programmed to the set of memory cells.

公开(公告)号：US11947452B2

公开(公告)日：2024-04-02

申请号：US17830047

申请日：2022-06-01

Applicant: Micron Technology, Inc.

Inventor： Xiangyu Tang ,  David Ebsen ,  Ying Huang ,  Sundararajan Sankaranarayanan

IPC: G06F12/02 ,  G06F3/06

CPC classification number: G06F12/0253 ,  G06F3/0604 ,  G06F3/0652 ,  G06F3/0679

Abstract: A subset of blocks from a set of blocks of a memory device are identified based on a valid data count constraint. A first block from the subset of blocks is selected based on a valid data count of the first block. A second block from the subset of blocks is selected based on a data temperature of the second block. A comparison of the first block and the second block is performed in accordance with one or more comparison criterion. The first block or the second block is selected as a garbage collection source block based on the comparison. Garbage collection is performed at the garbage collection source block.

公开(公告)号：US12249364B2

公开(公告)日：2025-03-11

申请号：US17890040

申请日：2022-08-17

Applicant: Micron Technology, Inc.

Inventor： Huai-Yuan Tseng ,  Akira Goda ,  Kishore Kumar Muchherla ,  James Fitzpatrick ,  Tomoharu Tanaka ,  Eric N. Lee ,  Dung V. Nguyen ,  David Ebsen

IPC: G11C11/406 ,  G11C11/4076 ,  G11C11/408

Abstract: Methods, apparatuses and systems related to maintaining stored data are described. The apparatus may be configured to refresh the stored data according to schedule that includes different delays between successive refresh operations.

公开(公告)号：US20240202114A1

公开(公告)日：2024-06-20

申请号：US18591777

申请日：2024-02-29

Applicant: Micron Technology, Inc.

Inventor： Xiangyu Tang ,  David Ebsen ,  Ying Huang ,  Sundararajan Sankaranarayanan

IPC: G06F12/02 ,  G06F3/06

CPC classification number: G06F12/0253 ,  G06F3/0604 ,  G06F3/0652 ,  G06F3/0679

Abstract: A subset of blocks from a set of blocks of a memory device are identified based on a valid data count constraint. A first block from the subset of blocks is selected based on a valid data count of the first block. A second block from the subset of blocks is selected based on a data temperature of the second block. A comparison of the first block and the second block is performed in accordance with one or more comparison criterion. The first block or the second block is selected as a garbage collection source block based on the comparison. Garbage collection is performed at the garbage collection source block.

公开(公告)号：US20240062799A1

公开(公告)日：2024-02-22

申请号：US17890040

申请日：2022-08-17

Applicant: Micron Technology, Inc.

Inventor： Huai-Yuan Tseng ,  Akira Goda ,  Kishore Kumar Muchherla ,  James Fitzpatrick ,  Tomoharu Tanaka ,  Eric N. Lee ,  Dung V. Nguyen ,  David Ebsen

IPC: G11C11/406 ,  G11C11/4076 ,  G11C11/408

CPC classification number: G11C11/40615 ,  G11C11/40618 ,  G11C11/4076 ,  G11C11/4085

Abstract: Methods, apparatuses and systems related to maintaining stored data are described. The apparatus may be configured to refresh the stored data according to schedule that includes different delays between successive refresh operations.