公开(公告)号：US20160018993A1

公开(公告)日：2016-01-21

申请号：US14867139

申请日：2015-09-28

Applicant: Micron Technology, Inc.

Inventor： Troy A. Manning ,  Troy D. Larsen ,  Martin L. Culley ,  Jeffrey L. Meader ,  Steve G. Bard ,  Dean C. Eyres

IPC: G06F3/06

CPC classification number: G06F3/0608 ,  G06F3/0661 ,  G06F3/0673 ,  H03M7/30 ,  H03M7/60 ,  H03M7/6082

Abstract: The present disclosure includes apparatuses and methods for data compression and management. A number of methods include receiving a number of data segments corresponding to a managed unit amount of data, determining a respective compressibility of each of the number of data segments, compressing each of the number of data segments in accordance with its respective determined compressibility, forming a compressed managed unit that includes compressed and/or uncompressed data segments corresponding to the number of data segments corresponding to the managed unit amount of data, and forming a page of data that comprises at least the compressed managed unit.

公开(公告)号：US20140258780A1

公开(公告)日：2014-09-11

申请号：US13785668

申请日：2013-03-05

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Dean C. Eyres

IPC: G06F11/27

CPC classification number: G11C29/16 ,  G11C29/4401 ,  G11C2029/0409

Abstract: Examples of memory controllers are described that may repair a memory using a bus between the memory controller and the memory. The memory controllers may include a test mode engine able to place the memory into a test mode of operation using a combination of signals over the bus, which combination of signals may be illegal in normal operation. The memory system controllers may include a BIST engine for testing the memory and obtaining information regarding memory fail information. The test mode engines may be configured to adjust a clock frequency during the test mode of operation, including stopping a clock signal in some examples between test mode commands.

Abstract translation: 描述了可以使用存储器控制器和存储器之间的总线修复存储器的存储器控​​制器的示例。 存储器控制器可以包括能够使用总线上的信号的组合将存储器置于测试操作模式的测试模式引擎，在正常操作中信号的组合可能是非法的。 存储器系统控制器可以包括用于测试存储器并获得关于存储器故障信息的信息的BIST引擎。 测试模式引擎可以被配置为在测试操作模式期间调整时钟频率，包括在测试模式命令之间的一些示例中停止时钟信号。

公开(公告)号：US09696910B2

公开(公告)日：2017-07-04

申请号：US14867139

申请日：2015-09-28

Applicant: Micron Technology, Inc.

Inventor： Troy A. Manning ,  Troy D. Larsen ,  Martin L. Culley ,  Jeffrey L. Meader ,  Steve G. Bard ,  Dean C. Eyres

IPC: G06F3/06 ,  H03M7/30

CPC classification number: G06F3/0608 ,  G06F3/0661 ,  G06F3/0673 ,  H03M7/30 ,  H03M7/60 ,  H03M7/6082

Abstract: The present disclosure includes apparatuses and methods for data compression and management. A number of methods include receiving a number of data segments corresponding to a managed unit amount of data, determining a respective compressibility of each of the number of data segments, compressing each of the number of data segments in accordance with its respective determined compressibility, forming a compressed managed unit that includes compressed and/or uncompressed data segments corresponding to the number of data segments corresponding to the managed unit amount of data, and forming a page of data that comprises at least the compressed managed unit.