公开(公告)号：US20220271007A1

公开(公告)日：2022-08-25

申请号：US17723386

申请日：2022-04-18

Applicant: Micron Technology, Inc.

Inventor： Enyong Tai ,  Hem P. Takiar ,  Li Wang ,  Hong Wan Ng

IPC: H01L25/065 ,  H01L23/00 ,  H01L25/18 ,  H01L25/00

Abstract: A semiconductor device assembly includes a substrate, a first stack of semiconductor dies disposed directly over a first location on the substrate, and a second stack of semiconductor dies disposed directly over a second location on the substrate and electrically coupled to a second subset of the plurality of external connections. A portion of the semiconductor dies of the second stack overlaps a portion of the semiconductor dies of the first stack. The semiconductor device assembly further includes an encapsulant at least partially encapsulating the substrate, the first stack and the second stack.

公开(公告)号：US20220068877A1

公开(公告)日：2022-03-03

申请号：US17003789

申请日：2020-08-26

Applicant: Micron Technology, Inc.

Inventor： Enyong Tai ,  Hem P. Takiar ,  Li Wang ,  Hong Wan Ng

IPC: H01L25/065 ,  H01L23/00 ,  H01L25/18 ,  H01L25/00

Abstract: A semiconductor device assembly includes a substrate having a plurality of external connections, a first stack of semiconductor dies disposed directly over a first location on the substrate and electrically coupled to a first subset of the plurality of external connections, and a second stack of semiconductor dies disposed directly over a second location on the substrate and electrically coupled to a second subset of the plurality of external connections. A portion of the semiconductor dies of the second stack overlaps a portion of the semiconductor dies of the first stack. The semiconductor device assembly further includes an encapsulant at least partially encapsulating the substrate, the first stack and the second stack.

公开(公告)号：US20240153912A1

公开(公告)日：2024-05-09

申请号：US18416180

申请日：2024-01-18

Applicant: Micron Technology, Inc.

Inventor： Enyong Tai ,  Hem P. Takiar ,  Li Wang ,  Hong Wan Ng

IPC: H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L25/18

CPC classification number: H01L25/0652 ,  H01L24/45 ,  H01L24/85 ,  H01L25/18 ,  H01L25/50 ,  H01L2225/06562

Abstract: A semiconductor device assembly includes a substrate, a first stack of semiconductor dies disposed directly over a first location on the substrate, and a second stack of semiconductor dies disposed directly over a second location on the substrate and electrically coupled to a second subset of the plurality of external connections. A portion of the semiconductor dies of the second stack overlaps a portion of the semiconductor dies of the first stack. The semiconductor device assembly further includes an encapsulant at least partially encapsulating the substrate, the first stack and the second stack.

公开(公告)号：US11908833B2

公开(公告)日：2024-02-20

申请号：US17723386

申请日：2022-04-18

Applicant: Micron Technology, Inc.

Inventor： Enyong Tai ,  Hem P. Takiar ,  Li Wang ,  Hong Wan Ng

IPC: H01L25/065 ,  H01L23/00 ,  H01L25/18 ,  H01L25/00

CPC classification number: H01L25/0652 ,  H01L24/45 ,  H01L24/85 ,  H01L25/18 ,  H01L25/50 ,  H01L2225/06562

Abstract: A semiconductor device assembly includes a substrate, a first stack of semiconductor dies disposed directly over a first location on the substrate, and a second stack of semiconductor dies disposed directly over a second location on the substrate and electrically coupled to a second subset of the plurality of external connections. A portion of the semiconductor dies of the second stack overlaps a portion of the semiconductor dies of the first stack. The semiconductor device assembly further includes an encapsulant at least partially encapsulating the substrate, the first stack and the second stack.

公开(公告)号：US11309281B2

公开(公告)日：2022-04-19

申请号：US17003789

申请日：2020-08-26

Applicant: Micron Technology, Inc.

Inventor： Enyong Tai ,  Hem P. Takiar ,  Li Wang ,  Hong Wan Ng

IPC: H01L25/065 ,  H01L23/00 ,  H01L25/18 ,  H01L25/00

Abstract: A semiconductor device assembly includes a substrate having a plurality of external connections, a first stack of semiconductor dies disposed directly over a first location on the substrate and electrically coupled to a first subset of the plurality of external connections, and a second stack of semiconductor dies disposed directly over a second location on the substrate and electrically coupled to a second subset of the plurality of external connections. A portion of the semiconductor dies of the second stack overlaps a portion of the semiconductor dies of the first stack. The semiconductor device assembly further includes an encapsulant at least partially encapsulating the substrate, the first stack and the second stack.