公开(公告)号：US20220300409A1

公开(公告)日：2022-09-22

申请号：US17272113

申请日：2020-09-21

Applicant: Micron Technology, Inc.

Inventor： Xinghui Duan ,  Bin Zhao ,  Jianxiong Huang

IPC: G06F12/02 ,  G06F12/06 ,  G06F13/16

Abstract: Devices and techniques for improving memory access operations of a memory device are provided. In an example, a method can include loading multiple LBA-to-physical address (L2P) regions of an L2P table from memory arrays of the memory device to a mapping cache in response to determining the LBA of the memory access command is not within the L2P region including of a mapping cache. When the memory access command is a sequential command, the multiple L2P regions loaded to the mapping cache can provide improved memory access performance.

公开(公告)号：US11868245B2

公开(公告)日：2024-01-09

申请号：US17272113

申请日：2020-09-21

Applicant: Micron Technology, Inc.

Inventor： Xinghui Duan ,  Bin Zhao ,  Jianxiong Huang

IPC: G06F12/02 ,  G06F12/06 ,  G06F13/16

CPC classification number: G06F12/0246 ,  G06F12/0623 ,  G06F13/1668 ,  G06F2212/7201 ,  G06F2212/7203

Abstract: Devices and techniques for improving memory access operations of a memory device are provided. In an example, a method can include loading multiple LBA-to-physical address (L2P) regions of an L2P table from memory arrays of the memory device to a mapping cache in response to determining the LBA of the memory access command is not within the L2P region including of a mapping cache. When the memory access command is a sequential command, the multiple L2P regions loaded to the mapping cache can provide improved memory access performance.