公开(公告)号：US11921647B2

公开(公告)日：2024-03-05

申请号：US18092748

申请日：2023-01-03

Applicant: Micron Technology, Inc.

Inventor： Keith A Benjamin ,  Thomas Dougherty

IPC: G06F13/12 ,  G05F1/66 ,  G06F1/32 ,  G06F1/3203

CPC classification number: G06F13/126 ,  G05F1/66 ,  G06F1/3203

Abstract: A system can include a plurality of sequencers each configured to provide a number of sequenced output signals responsive to assertion of a respective sequencer enable signal provided thereto. The system can include chaining circuitry coupled to the plurality of sequencers. The chaining circuitry can comprise logic to: responsive to assertion of a primary enable signal received thereby, assert respective sequencer enable signals provided to the plurality of sequencers in accordance with a first sequence; and responsive to deassertion of the primary enable signal, assert the respective sequencer enable signals provided to the plurality of sequencers in accordance with a second sequence.

公开(公告)号：US11868280B2

公开(公告)日：2024-01-09

申请号：US18092748

申请日：2023-01-03

Applicant: Micron Technology, Inc.

Inventor： Keith A Benjamin ,  Thomas Dougherty

IPC: G06F13/12 ,  G06F1/32 ,  G05F1/66 ,  G06F1/3203

CPC classification number: G06F13/126 ,  G05F1/66 ,  G06F1/3203

Abstract: A system can include a plurality of sequencers each configured to provide a number of sequenced output signals responsive to assertion of a respective sequencer enable signal provided thereto. The system can include chaining circuitry coupled to the plurality of sequencers. The chaining circuitry can comprise logic to: responsive to assertion of a primary enable signal received thereby, assert respective sequencer enable signals provided to the plurality of sequencers in accordance with a first sequence; and responsive to deassertion of the primary enable signal, assert the respective sequencer enable signals provided to the plurality of sequencers in accordance with a second sequence.