公开(公告)号：US20030203566A1

公开(公告)日：2003-10-30

申请号：US10371694

申请日：2003-02-20

Applicant: Micron Technology, Inc.

Inventor： Mark McQueen ,  Luan C. Tran ,  Chandra Mouli

IPC: H01L021/8242

CPC classification number: H01L27/10873 ,  H01L21/28123 ,  H01L27/105 ,  H01L27/10882 ,  H01L27/10894

Abstract: The invention includes a DRAM array having a structure therein which includes a first material separated from a second material by an intervening insulative material. The first material is doped to at least 1null1017 atoms/cm3 with n-type and p-type dopant. The invention also includes a semiconductor construction in which a doped material is over a segment of a substrate. The doped material has a first type majority dopant therein, and is electrically connected with an electrical ground. A pair of conductively-doped diffusion regions are adjacent the segment, and spaced from one another by at least a portion of the segment. The conductively-doped diffusion regions have a second type majority dopant therein. The invention also encompasses methods of forming semiconductor constructions.

Abstract translation: 本发明包括其中具有结构的DRAM阵列，其包括通过中间绝缘材料与第二材料分离的第一材料。 第一种材料与n型和p型掺杂剂掺杂至至少1×10 17个原子/ cm 3。 本发明还包括半导体结构，其中掺杂材料在衬底的一段上方。 掺杂材料在其中具有第一类型多数掺杂剂，并且与电接地电连接。 一对导电掺杂的扩散区域与该段相邻，并且通过该段的至少一部分彼此间隔开。 导电掺杂扩散区域中具有第二类型多数掺杂剂。 本发明还包括形成半导体结构的方法。